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authorRoland Scheidegger <[email protected]>2009-07-31 23:24:44 +0200
committerRoland Scheidegger <[email protected]>2009-07-31 23:24:44 +0200
commit801c3fcbca69a17f0696522b91cbfc378094974b (patch)
tree6dc778c73a25d8e5463a1d216b64e31854d4dcbd /src/mesa/drivers/dri/radeon
parent2730ee75c73e79f4196d6df5540da7063a96c25e (diff)
radeon: fix r100/r200 compressed texture stride
This almost fixes compressed mipmapped textures on r200, though some small mip levels are still broken. Leave r300 compressed texture stride as is though afaik it's different to pre-radeon-rewrite too. Also do the fixup for rs600 uncompressed row stride at same place.
Diffstat (limited to 'src/mesa/drivers/dri/radeon')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_common_context.c13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c
index 4e4eba5d94c..2a017b59cfc 100644
--- a/src/mesa/drivers/dri/radeon/radeon_common_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c
@@ -245,9 +245,20 @@ GLboolean radeonInitContext(radeonContextPtr radeon,
radeon->texture_row_align = 256;
radeon->texture_rect_row_align = 256;
radeon->texture_compressed_row_align = 256;
- } else {
+ } else if (IS_R200_CLASS(radeon->radeonScreen) ||
+ IS_R100_CLASS(radeon->radeonScreen)) {
radeon->texture_row_align = 32;
radeon->texture_rect_row_align = 64;
+ radeon->texture_compressed_row_align = 32;
+ } else { /* R300 - not sure this is all correct */
+ int chip_family = radeon->radeonScreen->chip_family;
+ if (chip_family == CHIP_FAMILY_RS600 ||
+ chip_family == CHIP_FAMILY_RS690 ||
+ chip_family == CHIP_FAMILY_RS740)
+ radeon->texture_row_align = 64;
+ else
+ radeon->texture_row_align = 32;
+ radeon->texture_rect_row_align = 64;
radeon->texture_compressed_row_align = 64;
}