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authorEric Anholt <[email protected]>2005-11-02 01:15:07 +0000
committerEric Anholt <[email protected]>2005-11-02 01:15:07 +0000
commit3a5626cb846ad767fe1c38fe35ebe4df3e3a0454 (patch)
treeea04046515c2f8c69e413416fe4baca8d1b66163 /src/mesa/drivers/dri/radeon/radeon_screen.h
parenta9b927cb6e5b4a98cf324faa2b0d61de1ce1a090 (diff)
First step of Radeon DRI unification:
- Makes all three drivers use the same screen structure and setup code, with a few ifdefs for the separate compilation to deal with symbols not being available to all drivers and the fact that we have no mechanism for dealing with different config options for different chip families in the same driver. These issues should be dealt with later. - Introduces IS_R[123]00_CLASS(radeonScreenPtr) macro for code for taking different paths depending on the general class of chipset. - Adds many new R300-class PCI IDs, though not all those listed in radeon_driver.c.
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_screen.h')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.h25
1 files changed, 17 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.h b/src/mesa/drivers/dri/radeon/radeon_screen.h
index 0bf88d98416..e8c58568a69 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.h
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.h
@@ -41,8 +41,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* IMPORTS: these headers contain all the DRI, X and kernel-related
* definitions that we need.
*/
-/* #include "dri_util.h" */
+#include "dri_util.h"
#include "radeon_dri.h"
+#include "radeon_chipset.h"
#include "radeon_reg.h"
#include "drm_sarea.h"
#include "xmlconfig.h"
@@ -54,13 +55,9 @@ typedef struct {
drmAddress map; /* Mapping of the DRM region */
} radeonRegionRec, *radeonRegionPtr;
-/* chipset features */
-#define RADEON_CHIPSET_TCL (1 << 0)
-#define RADEON_CHIPSET_BROKEN_STENCIL (1 << 1)
-
typedef struct {
-
- int chipset;
+ int chip_family;
+ int chip_flags;
int cpp;
int IsPCI; /* Current card is a PCI card */
int AGPMode;
@@ -93,12 +90,24 @@ typedef struct {
unsigned int sarea_priv_offset;
unsigned int gart_buffer_offset; /* offset in card memory space */
unsigned int gart_texture_offset; /* offset in card memory space */
+ unsigned int gart_base;
+ GLboolean drmSupportsCubeMaps; /* need radeon kernel module >= 1.7 */
+ GLboolean drmSupportsBlendColor; /* need radeon kernel module >= 1.11 */
+ GLboolean drmSupportsTriPerf; /* need radeon kernel module >= 1.16 */
+ GLboolean drmSupportsFragShader; /* need radeon kernel module >= 1.18 */
+ GLboolean drmSupportsPointSprites; /* need radeon kernel module >= 1.13 */
GLboolean depthHasSurface;
/* Configuration cache with default values for all contexts */
driOptionCache optionCache;
- GLboolean drmSupportsCubeMaps;
} radeonScreenRec, *radeonScreenPtr;
+#define IS_R100_CLASS(screen) \
+ ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R100)
+#define IS_R200_CLASS(screen) \
+ ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R200)
+#define IS_R300_CLASS(screen) \
+ ((screen->chip_flags & RADEON_CLASS_MASK) == RADEON_CLASS_R300)
+
#endif /* __RADEON_SCREEN_H__ */