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authorBrian Paul <[email protected]>2005-05-04 20:11:35 +0000
committerBrian Paul <[email protected]>2005-05-04 20:11:35 +0000
commite4b2356c07d31fbeeabb13b2fb47db703b473080 (patch)
treed8b7f1c7c9e7c84d84349485f942dd205dd4c16d /src/mesa/drivers/dri/radeon/radeon_ioctl.c
parentebef61f5c0950572f9c6a81b08f447957461675c (diff)
Major check-in of changes for GL_EXT_framebuffer_object extension.
Main driver impacts: - new code for creating the Mesa GLframebuffer - new span/pixel read/write code Some drivers not yet updated/tested.
Diffstat (limited to 'src/mesa/drivers/dri/radeon/radeon_ioctl.c')
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_ioctl.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_ioctl.c b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
index cf7e9a8b27f..3e1fc4bafff 100644
--- a/src/mesa/drivers/dri/radeon/radeon_ioctl.c
+++ b/src/mesa/drivers/dri/radeon/radeon_ioctl.c
@@ -1048,26 +1048,26 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
radeonFlush( ctx );
- if ( mask & DD_FRONT_LEFT_BIT ) {
+ if ( mask & BUFFER_BIT_FRONT_LEFT ) {
flags |= RADEON_FRONT;
color_mask = rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK];
- mask &= ~DD_FRONT_LEFT_BIT;
+ mask &= ~BUFFER_BIT_FRONT_LEFT;
}
- if ( mask & DD_BACK_LEFT_BIT ) {
+ if ( mask & BUFFER_BIT_BACK_LEFT ) {
flags |= RADEON_BACK;
color_mask = rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK];
- mask &= ~DD_BACK_LEFT_BIT;
+ mask &= ~BUFFER_BIT_BACK_LEFT;
}
- if ( mask & DD_DEPTH_BIT ) {
+ if ( mask & BUFFER_BIT_DEPTH ) {
flags |= RADEON_DEPTH;
- mask &= ~DD_DEPTH_BIT;
+ mask &= ~BUFFER_BIT_DEPTH;
}
- if ( (mask & DD_STENCIL_BIT) && rmesa->state.stencil.hwBuffer ) {
+ if ( (mask & BUFFER_BIT_STENCIL) && rmesa->state.stencil.hwBuffer ) {
flags |= RADEON_STENCIL;
- mask &= ~DD_STENCIL_BIT;
+ mask &= ~BUFFER_BIT_STENCIL;
}
if ( mask ) {