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authorAlex Deucher <[email protected]>2009-06-09 18:20:57 -0400
committerAlex Deucher <[email protected]>2009-06-09 18:20:57 -0400
commit530e3e389dfb3957b872d08906dcea830407b0c2 (patch)
treed457aaa3fe44b9b02098db2e8fc6d08b68282f9c /src/mesa/drivers/dri/r600/r700_chip.c
parent8c27d99eb84709013f420a7500ddfdef71ac7391 (diff)
Pull in additional state setup from the DDX
Diffstat (limited to 'src/mesa/drivers/dri/r600/r700_chip.c')
-rw-r--r--src/mesa/drivers/dri/r600/r700_chip.c50
1 files changed, 50 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c
index 7fd557ca8e2..8e7787eeef1 100644
--- a/src/mesa/drivers/dri/r600/r700_chip.c
+++ b/src/mesa/drivers/dri/r600/r700_chip.c
@@ -57,6 +57,13 @@ GLboolean r700InitChipObject(context_t *context)
r700->pStateList = (ContextState*) MALLOC (sizeof(ContextState)*sizeof(R700_CHIP_CONTEXT)/sizeof(unsigned int));
pStateListWork = r700->pStateList;
+ // misc
+ LINK_STATES(TA_CNTL_AUX);
+ LINK_STATES(VC_ENHANCE);
+ LINK_STATES(SQ_DYN_GPR_CNTL_PS_FLUSH_REQ);
+ LINK_STATES(DB_DEBUG);
+ LINK_STATES(DB_WATERMARKS);
+
// DB
LINK_STATES(DB_DEPTH_SIZE);
LINK_STATES(DB_DEPTH_VIEW);
@@ -122,18 +129,26 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(PA_CL_GB_HORZ_DISC_ADJ);
// CB
+ LINK_STATES(CB_CLEAR_RED_R6XX);
+ LINK_STATES(CB_CLEAR_GREEN_R6XX);
+ LINK_STATES(CB_CLEAR_BLUE_R6XX);
+ LINK_STATES(CB_CLEAR_ALPHA_R6XX);
LINK_STATES(CB_TARGET_MASK);
LINK_STATES(CB_SHADER_MASK);
LINK_STATES(CB_BLEND_RED);
LINK_STATES(CB_BLEND_GREEN);
LINK_STATES(CB_BLEND_BLUE);
LINK_STATES(CB_BLEND_ALPHA);
+ LINK_STATES(CB_FOG_RED_R6XX);
+ LINK_STATES(CB_FOG_GREEN_R6XX);
+ LINK_STATES(CB_FOG_BLUE_R6XX);
LINK_STATES(CB_SHADER_CONTROL);
LINK_STATES(CB_COLOR_CONTROL);
LINK_STATES(CB_CLRCMP_CONTROL);
LINK_STATES(CB_CLRCMP_SRC);
LINK_STATES(CB_CLRCMP_DST);
LINK_STATES(CB_CLRCMP_MSK);
+ LINK_STATES(CB_BLEND_CONTROL);
// SX
LINK_STATES(SX_MISC);
@@ -145,6 +160,17 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(VGT_INDX_OFFSET);
LINK_STATES(VGT_MULTI_PRIM_IB_RESET_INDX);
LINK_STATES(VGT_OUTPUT_PATH_CNTL);
+ LINK_STATES(VGT_HOS_CNTL);
+ LINK_STATES(VGT_HOS_MAX_TESS_LEVEL);
+ LINK_STATES(VGT_HOS_MIN_TESS_LEVEL);
+ LINK_STATES(VGT_HOS_REUSE_DEPTH);
+ LINK_STATES(VGT_GROUP_PRIM_TYPE);
+ LINK_STATES(VGT_GROUP_FIRST_DECR);
+ LINK_STATES(VGT_GROUP_DECR);
+ LINK_STATES(VGT_GROUP_VECT_0_CNTL);
+ LINK_STATES(VGT_GROUP_VECT_1_CNTL);
+ LINK_STATES(VGT_GROUP_VECT_0_FMT_CNTL);
+ LINK_STATES(VGT_GROUP_VECT_1_FMT_CNTL);
LINK_STATES(VGT_GS_MODE);
LINK_STATES(VGT_PRIMITIVEID_EN);
LINK_STATES(VGT_DMA_NUM_INSTANCES);
@@ -153,6 +179,8 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(VGT_INSTANCE_STEP_RATE_1);
LINK_STATES(VGT_STRMOUT_EN);
LINK_STATES(VGT_REUSE_OFF);
+ LINK_STATES(VGT_VTX_CNT_EN);
+ LINK_STATES(VGT_STRMOUT_BUFFER_EN);
// SPI
LINK_STATES(SPI_VS_OUT_ID_0);
@@ -172,6 +200,8 @@ GLboolean r700InitChipObject(context_t *context)
LINK_STATES(SPI_INTERP_CONTROL_0);
LINK_STATES(SPI_INPUT_Z);
LINK_STATES(SPI_FOG_CNTL);
+ LINK_STATES(SPI_FOG_FUNC_SCALE);
+ LINK_STATES(SPI_FOG_FUNC_BIAS);
// SQ
LINK_STATES(SQ_ESGS_RING_ITEMSIZE);
@@ -570,3 +600,23 @@ GLboolean r700SendViewportState(context_t *context, int id)
return GL_TRUE;
}
+
+GLboolean r700SendSQConfig(context_t *context)
+{
+ R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context);
+ BATCH_LOCALS(&context->radeon);
+
+ BEGIN_BATCH_NO_AUTOSTATE(8);
+ R600_OUT_BATCH_REGSEQ(SQ_CONFIG, 6);
+ R600_OUT_BATCH(r700->sq_config.SQ_CONFIG.u32All);
+ R600_OUT_BATCH(r700->sq_config.SQ_GPR_RESOURCE_MGMT_1.u32All);
+ R600_OUT_BATCH(r700->sq_config.SQ_GPR_RESOURCE_MGMT_2.u32All);
+ R600_OUT_BATCH(r700->sq_config.SQ_THREAD_RESOURCE_MGMT.u32All);
+ R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_1.u32All);
+ R600_OUT_BATCH(r700->sq_config.SQ_STACK_RESOURCE_MGMT_2.u32All);
+ END_BATCH();
+ COMMIT_BATCH();
+
+ return GL_TRUE;
+}
+