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authorKenneth Graunke <[email protected]>2011-10-26 22:41:07 -0700
committerKenneth Graunke <[email protected]>2011-10-28 12:11:52 -0700
commit512431b3575eb5f2c27d8795c5e2191047ebb5ed (patch)
tree3e61cb9b6690a208d28c8dc2d46b3aa8dffd1b5c /src/mesa/drivers/dri/r300
parent058e712415a8160479f0df13367b1171ffd66902 (diff)
i965/fs: Use the actual hardware g0 register for texel offset setup.
The idea here is to set up the message header with the Sampler State pointer which the hardware provides as part of the PS Thread Payload in register g0. Unfortunately, the existing code fs_reg(GRF, 0, BRW_REGISTER_TYPE_UD)) actually references "virtual GRF 0" rather than the hardware g0. This is just some arbitrary GRF temporary which will get register allocated. So, we ended up setting up the header with garbage. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/r300')
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