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authorPauli Nieminen <[email protected]>2009-08-25 02:36:13 +0300
committerPauli Nieminen <[email protected]>2009-08-25 02:36:13 +0300
commitce7ed63f0c2f5cb1c030f73a5d8f6544eaac0f81 (patch)
tree7554a2723fabb39037101724e5f179b70bb5a948 /src/mesa/drivers/dri/r300
parent4297f32c246cc5b726d02745456c06952322958d (diff)
parent1d5a06a1f7812c055db1d724e40d21a0e3686dd1 (diff)
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into r600_state_predict
Diffstat (limited to 'src/mesa/drivers/dri/r300')
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.c28
-rw-r--r--src/mesa/drivers/dri/r300/r300_context.h1
2 files changed, 11 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_context.c b/src/mesa/drivers/dri/r300/r300_context.c
index 15c1eeb0d4d..0bf002caeab 100644
--- a/src/mesa/drivers/dri/r300/r300_context.c
+++ b/src/mesa/drivers/dri/r300/r300_context.c
@@ -238,8 +238,8 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
struct radeon_query_object *query = radeon->query.current;
BATCH_LOCALS(radeon);
- BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->num_z_pipes + 2);
- switch (r300->num_z_pipes) {
+ BEGIN_BATCH_NO_AUTOSTATE(3 * 2 *r300->radeon.radeonScreen->num_gb_pipes + 2);
+ switch (r300->radeon.radeonScreen->num_gb_pipes) {
case 4:
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_3);
OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1);
@@ -265,7 +265,7 @@ static void r300_emit_query_finish(radeonContextPtr radeon)
}
OUT_BATCH_REGVAL(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
END_BATCH();
- query->curr_offset += r300->num_z_pipes * sizeof(uint32_t);
+ query->curr_offset += r300->radeon.radeonScreen->num_gb_pipes * sizeof(uint32_t);
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
@@ -287,14 +287,12 @@ static void rv530_emit_query_finish_single_z(radeonContextPtr radeon)
query->emitted_begin = GL_FALSE;
}
-#if 0
static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
{
- r300ContextPtr r300 = (r300ContextPtr)radeon;
BATCH_LOCALS(radeon);
struct radeon_query_object *query = radeon->query.current;
- BEGIN_BATCH_NO_AUTOSTATE(6);
+ BEGIN_BATCH_NO_AUTOSTATE(14);
OUT_BATCH_REGVAL(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
OUT_BATCH_REGSEQ(R300_ZB_ZPASS_ADDR, 1);
OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
@@ -308,7 +306,6 @@ static void rv530_emit_query_finish_double_z(radeonContextPtr radeon)
assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
query->emitted_begin = GL_FALSE;
}
-#endif
static void r300_init_vtbl(radeonContextPtr radeon)
{
@@ -318,11 +315,12 @@ static void r300_init_vtbl(radeonContextPtr radeon)
radeon->vtbl.swtcl_flush = r300_swtcl_flush;
radeon->vtbl.pre_emit_atoms = r300_vtbl_pre_emit_atoms;
radeon->vtbl.fallback = r300_fallback;
- if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530)
- /* single Z gives me correct results on my hw need to check if we ever need
- * double z */
- radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
- else
+ if (radeon->radeonScreen->chip_family == CHIP_FAMILY_RV530) {
+ if (radeon->radeonScreen->num_z_pipes == 2)
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_double_z;
+ else
+ radeon->vtbl.emit_query_finish = rv530_emit_query_finish_single_z;
+ } else
radeon->vtbl.emit_query_finish = r300_emit_query_finish;
}
@@ -396,10 +394,6 @@ static void r300InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;
}
- if (r300->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV530)
- r300->num_z_pipes = 2;
- else
- r300->num_z_pipes = r300->radeon.radeonScreen->num_gb_pipes;
}
static void r300ParseOptions(r300ContextPtr r300, radeonScreenPtr screen)
@@ -436,7 +430,7 @@ static void r300InitGLExtensions(GLcontext *ctx)
if (r300->options.stencil_two_side_disabled)
_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
- if (ctx->Mesa_DXTn && !r300->options.s3tc_force_enabled) {
+ if (r300->options.s3tc_force_enabled) {
_mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
_mesa_enable_extension(ctx, "GL_S3_s3tc");
} else if (r300->options.s3tc_force_disabled) {
diff --git a/src/mesa/drivers/dri/r300/r300_context.h b/src/mesa/drivers/dri/r300/r300_context.h
index 3202c96c2ed..1dadcc0a697 100644
--- a/src/mesa/drivers/dri/r300/r300_context.h
+++ b/src/mesa/drivers/dri/r300/r300_context.h
@@ -529,7 +529,6 @@ struct r300_context {
uint32_t fallback;
DECLARE_RENDERINPUTS(render_inputs_bitset);
- int num_z_pipes;
};
#define R300_CONTEXT(ctx) ((r300ContextPtr)(ctx->DriverCtx))