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authorChristoph Brill <[email protected]>2008-02-25 20:11:46 +0100
committerChristoph Brill <[email protected]>2008-02-25 20:11:46 +0100
commitdf344b171c82707653b1175cfa153ef011effedb (patch)
treeb1458f7b0569f2b55615ef63aac6f956785e5190 /src/mesa/drivers/dri/r300/r300_reg.h
parenta3cee7cafb462aa0808703d044bcc76fc03b2750 (diff)
[r300] Replace more magic number by register definitions from AMD
Diffstat (limited to 'src/mesa/drivers/dri/r300/r300_reg.h')
-rw-r--r--src/mesa/drivers/dri/r300/r300_reg.h18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h
index fd5304ca4e0..45bd709deb6 100644
--- a/src/mesa/drivers/dri/r300/r300_reg.h
+++ b/src/mesa/drivers/dri/r300/r300_reg.h
@@ -1611,6 +1611,24 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
# define R300_RB3D_DSTCACHE_UNKNOWN_02 0x00000002
# define R300_RB3D_DSTCACHE_UNKNOWN_0A 0x0000000A
+#define R300_RB3D_DITHER_CTL 0x4E50
+# define R300_RB3D_DITHER_CTL_DITHER_MODE_TRUNCATE (0 << 0)
+# define R300_RB3D_DITHER_CTL_DITHER_MODE_ROUND (1 << 0)
+# define R300_RB3D_DITHER_CTL_DITHER_MODE_LUT (2 << 0)
+/* reserved */
+# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_TRUNCATE (0 << 2)
+# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_ROUND (1 << 2)
+# define R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT (2 << 2)
+/* reserved */
+
+#define R300_RB3D_AARESOLVE_CTL 0x4e88
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_NORMAL (0 << 0)
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE (1 << 0)
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_10 (0 << 1)
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_GAMMA_22 (1 << 1)
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_SAMPLE0 (0 << 2)
+# define R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE (1 << 2)
+
/* gap */
/* There seems to be no "write only" setting, so use Z-test = ALWAYS
* for this.