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authorRoland Scheidegger <[email protected]>2006-08-31 01:10:07 +0000
committerRoland Scheidegger <[email protected]>2006-08-31 01:10:07 +0000
commit901f83f14efbef80d03485580484dbdbc8f1234b (patch)
tree219d30323269e8170a230e87b2e6d1cf7c75f754 /src/mesa/drivers/dri/r200
parent7986cfbee019fbdfce8bb0a86d7b7e633e541014 (diff)
do not abort with not supported vertex prog output configuration, fallback instead
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r--src/mesa/drivers/dri/r200/r200_vertprog.c22
1 files changed, 19 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_vertprog.c b/src/mesa/drivers/dri/r200/r200_vertprog.c
index 8714cc7aa28..339d3603a48 100644
--- a/src/mesa/drivers/dri/r200/r200_vertprog.c
+++ b/src/mesa/drivers/dri/r200/r200_vertprog.c
@@ -407,6 +407,7 @@ static GLboolean r200_translate_vertex_program(struct r200_vertex_program *vp)
unsigned long hw_op;
vp->native = GL_FALSE;
+ vp->translated = GL_TRUE;
if (mesa_vp->Base.NumInstructions == 0)
return GL_FALSE;
@@ -422,6 +423,18 @@ static GLboolean r200_translate_vertex_program(struct r200_vertex_program *vp)
return GL_FALSE;
}
+ if ((mesa_vp->Base.OutputsWritten &
+ ~((1 << VERT_RESULT_HPOS) | (1 << VERT_RESULT_COL0) | (1 << VERT_RESULT_COL1) |
+ (1 << VERT_RESULT_FOGC) | (1 << VERT_RESULT_TEX0) | (1 << VERT_RESULT_TEX1) |
+ (1 << VERT_RESULT_TEX2) | (1 << VERT_RESULT_TEX3) | (1 << VERT_RESULT_TEX4) |
+ (1 << VERT_RESULT_TEX5) | (1 << VERT_RESULT_PSIZ))) != 0) {
+ if (R200_DEBUG & DEBUG_FALLBACKS) {
+ fprintf(stderr, "can't handle vert prog outputs 0x%x\n",
+ mesa_vp->Base.OutputsWritten);
+ }
+ return GL_FALSE;
+ }
+
if (mesa_vp->IsNVProgram) {
/* subtle differences in spec like guaranteed initialized regs could cause
headaches. Might want to remove the driconf option to enable it completely */
@@ -561,9 +574,12 @@ static GLboolean r200_translate_vertex_program(struct r200_vertex_program *vp)
Haven't seen attr 14 used, maybe that's for the hw pointsize vec1 (which is
not possibe to use with vertex progs as it is lacking in vert prog specification) */
- assert(mesa_vp->Base.OutputsWritten & (1 << VERT_RESULT_HPOS));
-
- vp->translated = GL_TRUE;
+ if (!(mesa_vp->Base.OutputsWritten & (1 << VERT_RESULT_HPOS))) {
+ if (R200_DEBUG & DEBUG_FALLBACKS) {
+ fprintf(stderr, "can't handle vert prog without position output\n");
+ }
+ return GL_FALSE;
+ }
o_inst = vp->instr;
for(vpi = mesa_vp->Base.Instructions; vpi->Opcode != OPCODE_END; vpi++, o_inst++){