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authorJon Smirl <[email protected]>2004-03-11 20:35:38 +0000
committerJon Smirl <[email protected]>2004-03-11 20:35:38 +0000
commitae4a1cc0666860bf5cc37a5cb549afc9aa5448b0 (patch)
tree495f1f0249dc177e65f956e16ae79f7ab5a0cb83 /src/mesa/drivers/dri/r200
parent157ec8bcf8b56d7951416d9ee13c98b7e82d099d (diff)
Adjustments to make everything use IOCTL/sarea defines in DRM instead
of glx/mini. removes glx/mini/drm.h glx/mini/sarea.h
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r--src/mesa/drivers/dri/r200/Makefile.solo8
-rw-r--r--src/mesa/drivers/dri/r200/r200_cmdbuf.c24
-rw-r--r--src/mesa/drivers/dri/r200/r200_context.c6
-rw-r--r--src/mesa/drivers/dri/r200/r200_context.h17
-rw-r--r--src/mesa/drivers/dri/r200/r200_ioctl.c52
-rw-r--r--src/mesa/drivers/dri/r200/r200_ioctl.h3
-rw-r--r--src/mesa/drivers/dri/r200/r200_lock.c11
-rw-r--r--src/mesa/drivers/dri/r200/r200_maos.c2
-rw-r--r--src/mesa/drivers/dri/r200/r200_pixel.c4
-rw-r--r--src/mesa/drivers/dri/r200/r200_sanity.c30
-rw-r--r--src/mesa/drivers/dri/r200/r200_sanity.h2
-rw-r--r--src/mesa/drivers/dri/r200/r200_screen.c22
-rw-r--r--src/mesa/drivers/dri/r200/r200_screen.h6
-rw-r--r--src/mesa/drivers/dri/r200/r200_state.c20
-rw-r--r--src/mesa/drivers/dri/r200/r200_state_init.c20
-rw-r--r--src/mesa/drivers/dri/r200/r200_texmem.c10
16 files changed, 121 insertions, 116 deletions
diff --git a/src/mesa/drivers/dri/r200/Makefile.solo b/src/mesa/drivers/dri/r200/Makefile.solo
index b0959b2b7f8..e2ac301cf33 100644
--- a/src/mesa/drivers/dri/r200/Makefile.solo
+++ b/src/mesa/drivers/dri/r200/Makefile.solo
@@ -7,7 +7,7 @@ TOP = ../../../../..
default: linux-solo
-SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver
+SHARED_INCLUDES = $(INCLUDE_DIRS) -I. -I../common -Iserver -I../drm/shared
MINIGLX_INCLUDES = -I$(TOP)/src/glx/mini
DEFINES += \
@@ -73,13 +73,13 @@ OBJECTS = $(C_SOURCES:.c=.o) \
$(ASM_SOURCES:.S=.o)
SYMLINKS = \
- server/radeon_common.h \
server/radeon_dri.c \
server/radeon_dri.h \
server/radeon.h \
server/radeon_macros.h \
- server/radeon_reg.h \
- server/radeon_sarea.h \
+ server/radeon_reg.h
+# server/radeon_sarea.h \
+# server/radeon_common.h \
$(SYMLINKS):
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 08dab8a4d8b..edea2df5721 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -172,7 +172,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa,
GLuint primitive,
GLuint vertex_nr )
{
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
assert(!(primitive & R200_VF_PRIM_WALK_IND));
@@ -182,7 +182,7 @@ extern void r200EmitVbufPrim( r200ContextPtr rmesa,
fprintf(stderr, "%s cmd_used/4: %d prim %x nr %d\n", __FUNCTION__,
rmesa->store.cmd_used/4, primitive, vertex_nr);
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 3 * sizeof(*cmd),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 3 * sizeof(*cmd),
__FUNCTION__ );
cmd[0].i = 0;
cmd[0].header.cmd_type = RADEON_CMD_PACKET3_CLIP;
@@ -225,7 +225,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
GLuint primitive,
GLuint min_nr )
{
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
GLushort *retval;
if (R200_DEBUG & DEBUG_IOCTL)
@@ -235,7 +235,7 @@ GLushort *r200AllocEltsOpenEnded( r200ContextPtr rmesa,
r200EmitState( rmesa );
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa,
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa,
12 + min_nr*2,
__FUNCTION__ );
cmd[0].i = 0;
@@ -268,13 +268,13 @@ void r200EmitVertexAOS( r200ContextPtr rmesa,
GLuint vertex_size,
GLuint offset )
{
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
if (R200_DEBUG & (DEBUG_PRIMS|DEBUG_IOCTL))
fprintf(stderr, "%s: vertex_size 0x%x offset 0x%x \n",
__FUNCTION__, vertex_size, offset);
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 5 * sizeof(int),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 5 * sizeof(int),
__FUNCTION__ );
cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
@@ -290,7 +290,7 @@ void r200EmitAOS( r200ContextPtr rmesa,
GLuint nr,
GLuint offset )
{
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
int sz = 3 + ((nr/2)*3) + ((nr&1)*2);
int i;
int *tmp;
@@ -298,7 +298,7 @@ void r200EmitAOS( r200ContextPtr rmesa,
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s nr arrays: %d\n", __FUNCTION__, nr);
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, sz * sizeof(int),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sz * sizeof(int),
__FUNCTION__ );
cmd[0].i = 0;
cmd[0].header.cmd_type = RADEON_CMD_PACKET3;
@@ -340,7 +340,7 @@ void r200EmitBlit( r200ContextPtr rmesa,
GLint dstx, GLint dsty,
GLuint w, GLuint h )
{
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s src %x/%x %d,%d dst: %x/%x %d,%d sz: %dx%d\n",
@@ -356,7 +356,7 @@ void r200EmitBlit( r200ContextPtr rmesa,
assert( w < (1<<16) );
assert( h < (1<<16) );
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 8 * sizeof(int),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 8 * sizeof(int),
__FUNCTION__ );
@@ -383,11 +383,11 @@ void r200EmitBlit( r200ContextPtr rmesa,
void r200EmitWait( r200ContextPtr rmesa, GLuint flags )
{
if (rmesa->dri.drmMinor >= 6) {
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
assert( !(flags & ~(RADEON_WAIT_2D|RADEON_WAIT_3D)) );
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, 1 * sizeof(int),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, 1 * sizeof(int),
__FUNCTION__ );
cmd[0].i = 0;
cmd[0].wait.cmd_type = RADEON_CMD_WAIT;
diff --git a/src/mesa/drivers/dri/r200/r200_context.c b/src/mesa/drivers/dri/r200/r200_context.c
index 977dcf38d41..fa37d2b2e2c 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -293,7 +293,7 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
rmesa->dri.drmMinor = sPriv->drmMinor;
rmesa->r200Screen = screen;
- rmesa->sarea = (RADEONSAREAPrivPtr)((GLubyte *)sPriv->pSAREA +
+ rmesa->sarea = (drm_radeon_sarea_t *)((GLubyte *)sPriv->pSAREA +
screen->sarea_priv_offset);
@@ -309,8 +309,8 @@ GLboolean r200CreateContext( const __GLcontextModes *glVisual,
screen->texSize[i],
12,
RADEON_NR_TEX_REGIONS,
- rmesa->sarea->texList[i],
- & rmesa->sarea->texAge[i],
+ (drmTextureRegionPtr)rmesa->sarea->tex_list[i],
+ & rmesa->sarea->tex_age[i],
& rmesa->swapped,
sizeof( r200TexObj ),
(destroy_texture_object_t *) r200DestroyTexObj );
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h
index 65ca9ef7622..b147e250fa4 100644
--- a/src/mesa/drivers/dri/r200/r200_context.h
+++ b/src/mesa/drivers/dri/r200/r200_context.h
@@ -39,8 +39,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifdef GLX_DIRECT_RENDERING
#include <inttypes.h>
+#include "drm.h"
+#include "radeon_drm.h"
#include "dri_util.h"
-#include "radeon_common.h"
#include "texmem.h"
#include "macros.h"
@@ -109,12 +110,12 @@ struct r200_pixel_state {
};
struct r200_scissor_state {
- XF86DRIClipRectRec rect;
+ drm_clip_rect_t rect;
GLboolean enabled;
GLuint numClipRects; /* Cliprects active */
GLuint numAllocedClipRects; /* Cliprects available */
- XF86DRIClipRectPtr pClipRects;
+ drm_clip_rect_t *pClipRects;
};
struct r200_stencilbuffer_state {
@@ -149,7 +150,7 @@ struct r200_tex_obj {
brought into the
texunit. */
- drmRadeonTexImage image[6][RADEON_MAX_TEXTURE_LEVELS];
+ drm_radeon_tex_image_t image[6][RADEON_MAX_TEXTURE_LEVELS];
/* Six, for the cube faces */
GLuint pp_txfilter; /* hardware register values */
@@ -568,7 +569,7 @@ struct r200_dri_mirror {
__DRIdrawablePrivate *drawable; /* DRI drawable bound to this ctx */
drmContext hwContext;
- drmLock *hwLock;
+ drm_hw_lock_t *hwLock;
int fd;
int drmMinor;
};
@@ -804,7 +805,7 @@ struct r200_context {
GLuint do_usleeps;
GLuint do_irqs;
GLuint irqsEmitted;
- drmRadeonIrqWait iw;
+ drm_radeon_irq_wait_t iw;
/* Clientdata textures;
*/
@@ -813,11 +814,11 @@ struct r200_context {
/* Drawable, cliprect and scissor information
*/
GLuint numClipRects; /* Cliprects for the draw buffer */
- XF86DRIClipRectPtr pClipRects;
+ drm_clip_rect_t *pClipRects;
unsigned int lastStamp;
GLboolean lost_context;
r200ScreenPtr r200Screen; /* Screen private DRI data */
- RADEONSAREAPrivPtr sarea; /* Private SAREA data */
+ drm_radeon_sarea_t *sarea; /* Private SAREA data */
/* TCL stuff
*/
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.c b/src/mesa/drivers/dri/r200/r200_ioctl.c
index 2b5dd88cad6..8f1d9fe59cd 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.c
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.c
@@ -62,7 +62,7 @@ static void r200WaitForIdle( r200ContextPtr rmesa );
int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller )
{
int ret, i;
- drmRadeonCmdBuffer cmd;
+ drm_radeon_cmd_buffer_t cmd;
if (R200_DEBUG & DEBUG_IOCTL) {
fprintf(stderr, "%s from %s\n", __FUNCTION__, caller);
@@ -108,10 +108,10 @@ int r200FlushCmdBufLocked( r200ContextPtr rmesa, const char * caller )
if (rmesa->state.scissor.enabled) {
cmd.nbox = rmesa->state.scissor.numClipRects;
- cmd.boxes = (drmClipRect *)rmesa->state.scissor.pClipRects;
+ cmd.boxes = (drm_clip_rect_t *)rmesa->state.scissor.pClipRects;
} else {
cmd.nbox = rmesa->numClipRects;
- cmd.boxes = (drmClipRect *)rmesa->pClipRects;
+ cmd.boxes = (drm_clip_rect_t *)rmesa->pClipRects;
}
ret = drmCommandWrite( rmesa->dri.fd,
@@ -243,13 +243,13 @@ void r200ReleaseDmaRegion( r200ContextPtr rmesa,
rmesa->dma.flush( rmesa );
if (--region->buf->refcount == 0) {
- drmRadeonCmdHeader *cmd;
+ drm_radeon_cmd_header_t *cmd;
if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_DMA))
fprintf(stderr, "%s -- DISCARD BUF %d\n", __FUNCTION__,
region->buf->buf->idx);
- cmd = (drmRadeonCmdHeader *)r200AllocCmdBuf( rmesa, sizeof(*cmd),
+ cmd = (drm_radeon_cmd_header_t *)r200AllocCmdBuf( rmesa, sizeof(*cmd),
__FUNCTION__ );
cmd->dma.cmd_type = RADEON_CMD_DMA_DISCARD;
cmd->dma.buf_idx = region->buf->buf->idx;
@@ -314,7 +314,7 @@ void r200AllocDmaRegionVerts( r200ContextPtr rmesa,
static CARD32 r200GetLastFrame(r200ContextPtr rmesa)
{
- drmRadeonGetParam gp;
+ drm_radeon_getparam_t gp;
int ret;
CARD32 frame;
@@ -332,7 +332,7 @@ static CARD32 r200GetLastFrame(r200ContextPtr rmesa)
static void r200EmitIrqLocked( r200ContextPtr rmesa )
{
- drmRadeonIrqEmit ie;
+ drm_radeon_irq_emit_t ie;
int ret;
ie.irq_seq = &rmesa->iw.irq_seq;
@@ -363,7 +363,7 @@ static void r200WaitIrq( r200ContextPtr rmesa )
static void r200WaitForFrameCompletion( r200ContextPtr rmesa )
{
- RADEONSAREAPrivPtr sarea = rmesa->sarea;
+ drm_radeon_sarea_t *sarea = rmesa->sarea;
if (rmesa->do_irqs) {
if (r200GetLastFrame(rmesa) < sarea->last_frame) {
@@ -403,7 +403,7 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv )
r200ContextPtr rmesa;
GLint nbox, i, ret;
GLboolean missed_target;
- uint64_t ust;
+ int64_t ust;
assert(dPriv);
assert(dPriv->driContextPriv);
@@ -432,8 +432,8 @@ void r200CopyBuffer( const __DRIdrawablePrivate *dPriv )
for ( i = 0 ; i < nbox ; ) {
GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS , nbox );
- XF86DRIClipRectPtr box = dPriv->pClipRects;
- XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+ drm_clip_rect_t *box = dPriv->pClipRects;
+ drm_clip_rect_t *b = rmesa->sarea->boxes;
GLint n = 0;
for ( ; i < nr ; i++ ) {
@@ -495,8 +495,8 @@ void r200PageFlip( const __DRIdrawablePrivate *dPriv )
/* Need to do this for the perf box placement:
*/
{
- XF86DRIClipRectPtr box = dPriv->pClipRects;
- XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+ drm_clip_rect_t *box = dPriv->pClipRects;
+ drm_clip_rect_t *b = rmesa->sarea->boxes;
b[0] = box[0];
rmesa->sarea->nbox = 1;
}
@@ -611,7 +611,7 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
/* Throttle the number of clear ioctls we do.
*/
while ( 1 ) {
- drmRadeonGetParam gp;
+ drm_radeon_getparam_t gp;
int ret;
int clear;
@@ -641,10 +641,10 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
for ( i = 0 ; i < dPriv->numClipRects ; ) {
GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );
- XF86DRIClipRectPtr box = dPriv->pClipRects;
- XF86DRIClipRectPtr b = rmesa->sarea->boxes;
- drmRadeonClearType clear;
- drmRadeonClearRect depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
+ drm_clip_rect_t *box = dPriv->pClipRects;
+ drm_clip_rect_t *b = rmesa->sarea->boxes;
+ drm_radeon_clear_t clear;
+ drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
GLint n = 0;
if ( !all ) {
@@ -687,15 +687,15 @@ static void r200Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
n--;
b = rmesa->sarea->boxes;
for ( ; n >= 0 ; n-- ) {
- depth_boxes[n].f[RADEON_CLEAR_X1] = (float)b[n].x1;
- depth_boxes[n].f[RADEON_CLEAR_Y1] = (float)b[n].y1;
- depth_boxes[n].f[RADEON_CLEAR_X2] = (float)b[n].x2;
- depth_boxes[n].f[RADEON_CLEAR_Y2] = (float)b[n].y2;
- depth_boxes[n].f[RADEON_CLEAR_DEPTH] = ctx->Depth.Clear;
+ depth_boxes[n].f[CLEAR_X1] = (float)b[n].x1;
+ depth_boxes[n].f[CLEAR_Y1] = (float)b[n].y1;
+ depth_boxes[n].f[CLEAR_X2] = (float)b[n].x2;
+ depth_boxes[n].f[CLEAR_Y2] = (float)b[n].y2;
+ depth_boxes[n].f[CLEAR_DEPTH] = ctx->Depth.Clear;
}
ret = drmCommandWrite( rmesa->dri.fd, DRM_RADEON_CLEAR,
- &clear, sizeof(drmRadeonClearType));
+ &clear, sizeof(clear));
if ( ret ) {
@@ -789,7 +789,7 @@ void *r200AllocateMemoryMESA(GLsizei size,
GET_CURRENT_CONTEXT(ctx);
r200ContextPtr rmesa;
int region_offset;
- drmRadeonMemAlloc alloc;
+ drm_radeon_mem_alloc_t alloc;
int ret;
if (R200_DEBUG & DEBUG_IOCTL)
@@ -832,7 +832,7 @@ void r200FreeMemoryMESA(GLvoid *pointer)
GET_CURRENT_CONTEXT(ctx);
r200ContextPtr rmesa;
int region_offset;
- drmRadeonMemFree memfree;
+ drm_radeon_mem_free_t memfree;
int ret;
if (R200_DEBUG & DEBUG_IOCTL)
diff --git a/src/mesa/drivers/dri/r200/r200_ioctl.h b/src/mesa/drivers/dri/r200/r200_ioctl.h
index 3c3ad3db547..06791946038 100644
--- a/src/mesa/drivers/dri/r200/r200_ioctl.h
+++ b/src/mesa/drivers/dri/r200/r200_ioctl.h
@@ -43,7 +43,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "r200_lock.h"
#include "xf86drm.h"
-#include "radeon_common.h"
+#include "drm.h"
+#include "radeon_drm.h"
extern void r200EmitState( r200ContextPtr rmesa );
extern void r200EmitVertexAOS( r200ContextPtr rmesa,
diff --git a/src/mesa/drivers/dri/r200/r200_lock.c b/src/mesa/drivers/dri/r200/r200_lock.c
index 3c3356eecb8..794a29972ae 100644
--- a/src/mesa/drivers/dri/r200/r200_lock.c
+++ b/src/mesa/drivers/dri/r200/r200_lock.c
@@ -32,7 +32,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* Authors:
* Keith Whitwell <[email protected]>
*/
-
+#include <string.h>
+
#include "r200_context.h"
#include "r200_lock.h"
#include "r200_tex.h"
@@ -50,7 +51,7 @@ static void
r200UpdatePageFlipping( r200ContextPtr rmesa )
{
int use_back;
- rmesa->doPageFlip = rmesa->sarea->pfAllowPageFlip;
+ rmesa->doPageFlip = rmesa->sarea->pfState;
use_back = (rmesa->glCtx->Color._DrawDestMask == BACK_LEFT_BIT);
use_back ^= (rmesa->sarea->pfCurrentPage == 1);
@@ -83,7 +84,7 @@ void r200GetLock( r200ContextPtr rmesa, GLuint flags )
{
__DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
__DRIscreenPrivate *sPriv = rmesa->dri.screen;
- RADEONSAREAPrivPtr sarea = rmesa->sarea;
+ drm_radeon_sarea_t *sarea = rmesa->sarea;
int i;
drmGetLock( rmesa->dri.fd, rmesa->dri.hwContext, flags );
@@ -108,8 +109,8 @@ void r200GetLock( r200ContextPtr rmesa, GLuint flags )
rmesa->lastStamp = dPriv->lastStamp;
}
- if ( sarea->ctxOwner != rmesa->dri.hwContext ) {
- sarea->ctxOwner = rmesa->dri.hwContext;
+ if ( sarea->ctx_owner != rmesa->dri.hwContext ) {
+ sarea->ctx_owner = rmesa->dri.hwContext;
}
for ( i = 0 ; i < rmesa->nr_heaps ; i++ ) {
diff --git a/src/mesa/drivers/dri/r200/r200_maos.c b/src/mesa/drivers/dri/r200/r200_maos.c
index fd2bd5102ad..a97736457fd 100644
--- a/src/mesa/drivers/dri/r200/r200_maos.c
+++ b/src/mesa/drivers/dri/r200/r200_maos.c
@@ -3,6 +3,8 @@
/* If using new packets, can choose either verts or arrays.
* Otherwise, must use verts.
*/
+#include <string.h>
+
#include "r200_context.h"
#define R200_MAOS_VERTS 0
#if (R200_MAOS_VERTS) || (R200_OLD_PACKETS)
diff --git a/src/mesa/drivers/dri/r200/r200_pixel.c b/src/mesa/drivers/dri/r200/r200_pixel.c
index 806484404d6..76e619903f1 100644
--- a/src/mesa/drivers/dri/r200/r200_pixel.c
+++ b/src/mesa/drivers/dri/r200/r200_pixel.c
@@ -220,7 +220,7 @@ r200TryReadPixels( GLcontext *ctx,
int src_pitch = rmesa->state.color.drawPitch * rmesa->r200Screen->cpp;
int dst_offset = r200GartOffsetFromVirtual( rmesa, pixels );
int dst_pitch = pitch * rmesa->r200Screen->cpp;
- XF86DRIClipRectRec *box = dPriv->pClipRects;
+ drm_clip_rect_t *box = dPriv->pClipRects;
int i;
r200EmitWait( rmesa, RADEON_WAIT_3D );
@@ -293,7 +293,7 @@ static void do_draw_pix( GLcontext *ctx,
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
__DRIdrawablePrivate *dPriv = rmesa->dri.drawable;
- XF86DRIClipRectPtr box = dPriv->pClipRects;
+ drm_clip_rect_t *box = dPriv->pClipRects;
int nbox = dPriv->numClipRects;
int i;
int blit_format;
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c
index 291536d5603..a21495df4ea 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.c
+++ b/src/mesa/drivers/dri/r200/r200_sanity.c
@@ -735,8 +735,8 @@ static void dump_state( void )
static int radeon_emit_packets(
- drmRadeonCmdHeader header,
- drmRadeonCmdBuffer *cmdbuf )
+ drm_radeon_cmd_header_t header,
+ drm_radeon_cmd_buffer_t *cmdbuf )
{
int id = (int)header.packet.packet_id;
int sz = packet[id].len;
@@ -771,8 +771,8 @@ static int radeon_emit_packets(
static int radeon_emit_scalars(
- drmRadeonCmdHeader header,
- drmRadeonCmdBuffer *cmdbuf )
+ drm_radeon_cmd_header_t header,
+ drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.scalars.count;
int *data = (int *)cmdbuf->buf;
@@ -799,8 +799,8 @@ static int radeon_emit_scalars(
static int radeon_emit_scalars2(
- drmRadeonCmdHeader header,
- drmRadeonCmdBuffer *cmdbuf )
+ drm_radeon_cmd_header_t header,
+ drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.scalars.count;
int *data = (int *)cmdbuf->buf;
@@ -833,8 +833,8 @@ static int radeon_emit_scalars2(
* Check: table start, end, nr, etc.
*/
static int radeon_emit_vectors(
- drmRadeonCmdHeader header,
- drmRadeonCmdBuffer *cmdbuf )
+ drm_radeon_cmd_header_t header,
+ drm_radeon_cmd_buffer_t *cmdbuf )
{
int sz = header.vectors.count;
int *data = (int *)cmdbuf->buf;
@@ -1009,7 +1009,7 @@ static int print_prim_and_flags( int prim )
/* build in knowledge about each packet type
*/
-static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3( drm_radeon_cmd_buffer_t *cmdbuf )
{
int cmdsz;
int *cmd = (int *)cmdbuf->buf;
@@ -1188,9 +1188,9 @@ static int radeon_emit_packet3( drmRadeonCmdBuffer *cmdbuf )
/* Check cliprects for bounds, then pass on to above:
*/
-static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
+static int radeon_emit_packet3_cliprect( drm_radeon_cmd_buffer_t *cmdbuf )
{
- XF86DRIClipRectRec *boxes = (XF86DRIClipRectRec *)cmdbuf->boxes;
+ drm_clip_rect_t *boxes = (drm_clip_rect_t *)cmdbuf->boxes;
int i = 0;
if (VERBOSE && total_changed) {
@@ -1217,11 +1217,11 @@ static int radeon_emit_packet3_cliprect( drmRadeonCmdBuffer *cmdbuf )
int r200SanityCmdBuffer( r200ContextPtr rmesa,
int nbox,
- XF86DRIClipRectRec *boxes )
+ drm_clip_rect_t *boxes )
{
int idx;
- drmRadeonCmdBuffer cmdbuf;
- drmRadeonCmdHeader header;
+ drm_radeon_cmd_buffer_t cmdbuf;
+ drm_radeon_cmd_header_t header;
static int inited = 0;
if (!inited) {
@@ -1232,7 +1232,7 @@ int r200SanityCmdBuffer( r200ContextPtr rmesa,
cmdbuf.buf = rmesa->store.cmd_buf;
cmdbuf.bufsz = rmesa->store.cmd_used;
- cmdbuf.boxes = (drmClipRect *)boxes;
+ cmdbuf.boxes = (drm_clip_rect_t *)boxes;
cmdbuf.nbox = nbox;
while ( cmdbuf.bufsz >= sizeof(header) ) {
diff --git a/src/mesa/drivers/dri/r200/r200_sanity.h b/src/mesa/drivers/dri/r200/r200_sanity.h
index 10260f21122..f4c110dba6e 100644
--- a/src/mesa/drivers/dri/r200/r200_sanity.h
+++ b/src/mesa/drivers/dri/r200/r200_sanity.h
@@ -3,6 +3,6 @@
extern int r200SanityCmdBuffer( r200ContextPtr rmesa,
int nbox,
- XF86DRIClipRectRec *boxes );
+ drm_clip_rect_t *boxes );
#endif
diff --git a/src/mesa/drivers/dri/r200/r200_screen.c b/src/mesa/drivers/dri/r200/r200_screen.c
index c3fa252a72d..3b4b343d94c 100644
--- a/src/mesa/drivers/dri/r200/r200_screen.c
+++ b/src/mesa/drivers/dri/r200/r200_screen.c
@@ -311,7 +311,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
{
int ret;
- drmRadeonGetParam gp;
+ drm_radeon_getparam_t gp;
gp.param = RADEON_PARAM_GART_BUFFER_OFFSET;
gp.value = &screen->gart_buffer_offset;
@@ -416,7 +416,7 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16;
if ( sPriv->drmMinor >= 10 ) {
- drmRadeonSetParam sp;
+ drm_radeon_setparam_t sp;
sp.param = RADEON_SETPARAM_FB_LOCATION;
sp.value = screen->fbLocation;
@@ -432,22 +432,22 @@ r200CreateScreen( __DRIscreenPrivate *sPriv )
screen->depthOffset = dri_priv->depthOffset;
screen->depthPitch = dri_priv->depthPitch;
- screen->texOffset[RADEON_CARD_HEAP] = dri_priv->textureOffset
+ screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset
+ screen->fbLocation;
- screen->texSize[RADEON_CARD_HEAP] = dri_priv->textureSize;
- screen->logTexGranularity[RADEON_CARD_HEAP] =
+ screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize;
+ screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] =
dri_priv->log2TexGran;
if ( !screen->gartTextures.map ) {
screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1;
- screen->texOffset[RADEON_GART_HEAP] = 0;
- screen->texSize[RADEON_GART_HEAP] = 0;
- screen->logTexGranularity[RADEON_GART_HEAP] = 0;
+ screen->texOffset[RADEON_GART_TEX_HEAP] = 0;
+ screen->texSize[RADEON_GART_TEX_HEAP] = 0;
+ screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0;
} else {
screen->numTexHeaps = RADEON_NR_TEX_HEAPS;
- screen->texOffset[RADEON_GART_HEAP] = screen->gart_texture_offset;
- screen->texSize[RADEON_GART_HEAP] = dri_priv->gartTexMapSize;
- screen->logTexGranularity[RADEON_GART_HEAP] =
+ screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset;
+ screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize;
+ screen->logTexGranularity[RADEON_GART_TEX_HEAP] =
dri_priv->log2GARTTexGran;
}
diff --git a/src/mesa/drivers/dri/r200/r200_screen.h b/src/mesa/drivers/dri/r200/r200_screen.h
index 44d67354d7e..5e0ee68565a 100644
--- a/src/mesa/drivers/dri/r200/r200_screen.h
+++ b/src/mesa/drivers/dri/r200/r200_screen.h
@@ -38,10 +38,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#ifdef GLX_DIRECT_RENDERING
-#include "dri_util.h"
#include "xf86drm.h"
-#include "radeon_common.h"
-#include "radeon_sarea.h"
+#include "drm.h"
+#include "radeon_drm.h"
+#include "dri_util.h"
#include "xmlconfig.h"
typedef struct {
diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c
index 21b73c92188..4b6edd07b5b 100644
--- a/src/mesa/drivers/dri/r200/r200_state.c
+++ b/src/mesa/drivers/dri/r200/r200_state.c
@@ -411,9 +411,9 @@ static void r200Fogfv( GLcontext *ctx, GLenum pname, const GLfloat *param )
*/
-static GLboolean intersect_rect( XF86DRIClipRectPtr out,
- XF86DRIClipRectPtr a,
- XF86DRIClipRectPtr b )
+static GLboolean intersect_rect( drm_clip_rect_t *out,
+ drm_clip_rect_t *a,
+ drm_clip_rect_t *b )
{
*out = *a;
if ( b->x1 > out->x1 ) out->x1 = b->x1;
@@ -428,7 +428,7 @@ static GLboolean intersect_rect( XF86DRIClipRectPtr out,
void r200RecalcScissorRects( r200ContextPtr rmesa )
{
- XF86DRIClipRectPtr out;
+ drm_clip_rect_t *out;
int i;
/* Grow cliprect store?
@@ -444,7 +444,7 @@ void r200RecalcScissorRects( r200ContextPtr rmesa )
rmesa->state.scissor.pClipRects =
MALLOC( rmesa->state.scissor.numAllocedClipRects *
- sizeof(XF86DRIClipRectRec) );
+ sizeof(drm_clip_rect_t) );
if ( rmesa->state.scissor.pClipRects == NULL ) {
rmesa->state.scissor.numAllocedClipRects = 0;
@@ -658,7 +658,7 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
GLuint i;
- drmRadeonStipple stipple;
+ drm_radeon_stipple_t stipple;
/* Must flip pattern upside down.
*/
@@ -675,7 +675,7 @@ static void r200PolygonStipple( GLcontext *ctx, const GLubyte *mask )
*/
stipple.mask = rmesa->state.stipple.mask;
drmCommandWrite( rmesa->dri.fd, DRM_RADEON_STIPPLE,
- &stipple, sizeof(drmRadeonStipple) );
+ &stipple, sizeof(stipple) );
UNLOCK_HARDWARE( rmesa );
}
@@ -1636,18 +1636,18 @@ void r200SetCliprects( r200ContextPtr rmesa, GLenum mode )
switch ( mode ) {
case GL_FRONT_LEFT:
rmesa->numClipRects = dPriv->numClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+ rmesa->pClipRects = dPriv->pClipRects;
break;
case GL_BACK_LEFT:
/* Can't ignore 2d windows if we are page flipping.
*/
if ( dPriv->numBackClipRects == 0 || rmesa->doPageFlip ) {
rmesa->numClipRects = dPriv->numClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pClipRects;
+ rmesa->pClipRects = dPriv->pClipRects;
}
else {
rmesa->numClipRects = dPriv->numBackClipRects;
- rmesa->pClipRects = (XF86DRIClipRectPtr)dPriv->pBackClipRects;
+ rmesa->pClipRects = dPriv->pBackClipRects;
}
break;
default:
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index 3601390ad2f..d9896c99dbc 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -74,7 +74,7 @@ void r200PrintDirty( r200ContextPtr rmesa, const char *msg )
static int cmdpkt( int id )
{
- drmRadeonCmdHeader h;
+ drm_radeon_cmd_header_t h;
h.i = 0;
h.packet.cmd_type = RADEON_CMD_PACKET;
h.packet.packet_id = id;
@@ -83,7 +83,7 @@ static int cmdpkt( int id )
static int cmdvec( int offset, int stride, int count )
{
- drmRadeonCmdHeader h;
+ drm_radeon_cmd_header_t h;
h.i = 0;
h.vectors.cmd_type = RADEON_CMD_VECTORS;
h.vectors.offset = offset;
@@ -94,7 +94,7 @@ static int cmdvec( int offset, int stride, int count )
static int cmdscl( int offset, int stride, int count )
{
- drmRadeonCmdHeader h;
+ drm_radeon_cmd_header_t h;
h.i = 0;
h.scalars.cmd_type = RADEON_CMD_SCALARS;
h.scalars.offset = offset;
@@ -105,7 +105,7 @@ static int cmdscl( int offset, int stride, int count )
static int cmdscl2( int offset, int stride, int count )
{
- drmRadeonCmdHeader h;
+ drm_radeon_cmd_header_t h;
h.i = 0;
h.scalars.cmd_type = RADEON_CMD_SCALARS2;
h.scalars.offset = offset - 0x100;
@@ -503,7 +503,7 @@ void r200InitState( r200ContextPtr rmesa )
(2 << R200_TXFORMAT_WIDTH_SHIFT) |
(2 << R200_TXFORMAT_HEIGHT_SHIFT));
rmesa->hw.tex[i].cmd[TEX_PP_TXOFFSET] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.tex[i].cmd[TEX_PP_BORDER_COLOR] = 0;
rmesa->hw.tex[i].cmd[TEX_PP_TXFORMAT_X] =
(/* R200_TEXCOORD_PROJ | */
@@ -511,15 +511,15 @@ void r200InitState( r200ContextPtr rmesa )
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_FACES] = 0;
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F1] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F2] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F3] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F4] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
rmesa->hw.cube[i].cmd[CUBE_PP_CUBIC_OFFSET_F5] =
- rmesa->r200Screen->texOffset[RADEON_CARD_HEAP];
+ rmesa->r200Screen->texOffset[RADEON_LOCAL_TEX_HEAP];
}
rmesa->hw.pix[0].cmd[PIX_PP_TXCBLEND] =
diff --git a/src/mesa/drivers/dri/r200/r200_texmem.c b/src/mesa/drivers/dri/r200/r200_texmem.c
index 473520a9507..05ef16e7be8 100644
--- a/src/mesa/drivers/dri/r200/r200_texmem.c
+++ b/src/mesa/drivers/dri/r200/r200_texmem.c
@@ -286,8 +286,8 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
GLuint offset;
GLint imageWidth, imageHeight;
GLint ret;
- drmRadeonTexture tex;
- drmRadeonTexImage tmp;
+ drm_radeon_texture_t tex;
+ drm_radeon_tex_image_t tmp;
const int level = hwlevel + t->base.firstLevel;
if ( R200_DEBUG & DEBUG_TEXTURE ) {
@@ -361,7 +361,7 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
t->image[face][hwlevel].data = texImage->Data;
- /* Init the DRM_RADEON_TEXTURE command / drmRadeonTexture struct.
+ /* Init the DRM_RADEON_TEXTURE command / drm_radeon_texture_t struct.
* NOTE: we're always use a 1KB-wide blit and I8 texture format.
* We used to use 1, 2 and 4-byte texels and used to use the texture
* width to dictate the blit width - but that won't work for compressed
@@ -383,12 +383,12 @@ static void uploadSubImage( r200ContextPtr rmesa, r200TexObjPtr t,
tex.image = &tmp;
/* copy (x,y,width,height,data) */
- memcpy( &tmp, &t->image[face][hwlevel], sizeof(drmRadeonTexImage) );
+ memcpy( &tmp, &t->image[face][hwlevel], sizeof(tmp) );
LOCK_HARDWARE( rmesa );
do {
ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE,
- &tex, sizeof(drmRadeonTexture) );
+ &tex, sizeof(drm_radeon_texture_t) );
if (ret) {
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "DRM_RADEON_TEXTURE: again!\n");