diff options
author | Roland Scheidegger <[email protected]> | 2006-05-27 09:03:25 +0000 |
---|---|---|
committer | Roland Scheidegger <[email protected]> | 2006-05-27 09:03:25 +0000 |
commit | 8a6182105772280e2727de4a00809c8fb7b13c87 (patch) | |
tree | c65d589e508fcdc0a43ceadef4b4ec8e68efd567 /src/mesa/drivers/dri/r200 | |
parent | 04fa003a501298500607c4e83e58cb0291ddc6e4 (diff) |
preparation for r200 hw vertex programs. Increase R200_CMD_BUF_SZ to 16k instead of 8k (the reasons why it was exactly 8k are unclear). Add register defines, sanity code, fix potential issue with wrong statechange order when disabling fragment programs.
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_context.h | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_reg.h | 16 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_sanity.c | 66 | ||||
-rw-r--r-- | src/mesa/drivers/dri/r200/r200_state.c | 6 |
4 files changed, 86 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_context.h b/src/mesa/drivers/dri/r200/r200_context.h index f6709d3d7fd..0de131adc1d 100644 --- a/src/mesa/drivers/dri/r200/r200_context.h +++ b/src/mesa/drivers/dri/r200/r200_context.h @@ -637,7 +637,7 @@ struct r200_dri_mirror { }; -#define R200_CMD_BUF_SZ (8*1024) +#define R200_CMD_BUF_SZ (16*1024) struct r200_store { GLuint statenr; diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index 6d1b84769a8..dab08a9eb73 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -337,6 +337,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* gap */ #define R200_SE_VAP_CNTL 0x2080 #define R200_VAP_TCL_ENABLE 0x00000001 +#define R200_VAP_PROG_VTX_SHADER_ENABLE 0x00000004 #define R200_VAP_SINGLE_BUF_STATE_ENABLE 0x00000010 #define R200_VAP_FORCE_W_TO_ONE 0x00010000 #define R200_VAP_D3D_TEX_DEFAULT 0x00020000 @@ -660,6 +661,17 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_SE_TCL_POINT_SPRITE_CNTL 0x22c4 #define R200_POINTSIZE_SEL_STATE (1<<16) /* gap */ +/* taken from r300, see comments there */ +#define R200_VAP_PVS_CNTL_1 0x22d0 +# define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0 +# define R200_PVS_CNTL_1_POS_END_SHIFT 10 +# define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20 +/* Addresses are relative the the vertex program parameters area. */ +#define R200_VAP_PVS_CNTL_2 0x22d4 +# define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0 +# define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16 +/* gap */ + #define R200_SE_VTX_ST_POS_0_X_4 0x2300 #define R200_SE_VTX_ST_POS_0_Y_4 0x2304 #define R200_SE_VTX_ST_POS_0_Z_4 0x2308 @@ -1473,6 +1485,10 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define R200_VS_PNT_SPRITE_CLAMP 0x000000BE #define R200_VS_MAX 0x000001C0 +#define R200_PVS_PROG0 0x00000080 +#define R200_PVS_PROG1 0x00000180 +#define R200_PVS_PARAM0 0x00000000 +#define R200_PVS_PARAM1 0x00000100 /* * Offsets in TCL scalar state diff --git a/src/mesa/drivers/dri/r200/r200_sanity.c b/src/mesa/drivers/dri/r200/r200_sanity.c index 4dc87cd945d..8c9319fe278 100644 --- a/src/mesa/drivers/dri/r200/r200_sanity.c +++ b/src/mesa/drivers/dri/r200/r200_sanity.c @@ -160,6 +160,7 @@ static struct { { R200_PP_TXFILTER_3, 8, "R200_PP_TXCTLALL_3"}, { R200_PP_TXFILTER_4, 8, "R200_PP_TXCTLALL_4"}, { R200_PP_TXFILTER_5, 8, "R200_PP_TXCTLALL_5"}, + { R200_VAP_PVS_CNTL_1, 2, "R200_VAP_PVS_CNTL"}, }; struct reg_names { @@ -532,6 +533,8 @@ static struct reg_names reg_names[] = { { R200_PP_TXCBLEND2_15, "R200_PP_TXCBLEND2_15" }, { R200_PP_TXABLEND_15, "R200_PP_TXABLEND_15" }, { R200_PP_TXABLEND2_15, "R200_PP_TXABLEND2_15" }, + { R200_VAP_PVS_CNTL_1, "R200_VAP_PVS_CNTL_1" }, + { R200_VAP_PVS_CNTL_2, "R200_VAP_PVS_CNTL_2" }, }; static struct reg_names scalar_names[] = { @@ -935,6 +938,62 @@ static int radeon_emit_vectors( return 0; } +static int radeon_emit_veclinear( + drm_radeon_cmd_header_t header, + drm_radeon_cmd_buffer_t *cmdbuf ) +{ + int sz = header.veclinear.count * 4; + int *data = (int *)cmdbuf->buf; + float *fdata =(float *)cmdbuf->buf; + int start = header.veclinear.addr_lo | (header.veclinear.addr_hi << 8); + int i; + + if (1||VERBOSE) + fprintf(stderr, "emit vectors linear, start %d nr %d (end %d) (0x%x)\n", + start, sz >> 2, start + (sz >> 2), header.i); + + + if (start < 0x60) { + for (i = 0 ; i < sz ; i += 4) { + fprintf(stderr, "R200_VS_PARAM %d 0 %f\n", (i >> 2) + start , fdata[i]); + fprintf(stderr, "R200_VS_PARAM %d 1 %f\n", (i >> 2) + start, fdata[i+1]); + fprintf(stderr, "R200_VS_PARAM %d 2 %f\n", (i >> 2) + start, fdata[i+2]); + fprintf(stderr, "R200_VS_PARAM %d 3 %f\n", (i >> 2) + start, fdata[i+3]); + } + } + else if ((start >= 0x100) && (start < 0x160)) { + for (i = 0 ; i < sz ; i += 4) { + fprintf(stderr, "R200_VS_PARAM %d 0 %f\n", (i >> 2) + start - 0x100 + 0x60, fdata[i]); + fprintf(stderr, "R200_VS_PARAM %d 1 %f\n", (i >> 2) + start - 0x100 + 0x60, fdata[i+1]); + fprintf(stderr, "R200_VS_PARAM %d 2 %f\n", (i >> 2) + start - 0x100 + 0x60, fdata[i+2]); + fprintf(stderr, "R200_VS_PARAM %d 3 %f\n", (i >> 2) + start - 0x100 + 0x60, fdata[i+3]); + } + } + else if ((start >= 0x80) && (start < 0xc0)) { + for (i = 0 ; i < sz ; i += 4) { + fprintf(stderr, "R200_VS_PROG %d OPDST %08x\n", (i >> 2) + start - 0x80, data[i]); + fprintf(stderr, "R200_VS_PROG %d SRC1 %08x\n", (i >> 2) + start - 0x80, data[i+1]); + fprintf(stderr, "R200_VS_PROG %d SRC2 %08x\n", (i >> 2) + start - 0x80, data[i+2]); + fprintf(stderr, "R200_VS_PROG %d SRC3 %08x\n", (i >> 2) + start - 0x80, data[i+3]); + } + } + else if ((start >= 0x180) && (start < 0x1c0)) { + for (i = start ; (i < start + sz) ; i += 4) { + fprintf(stderr, "R200_VS_PROG %d OPDST %08x\n", (i >> 2) + start - 0x180 + 0x40, data[i]); + fprintf(stderr, "R200_VS_PROG %d SRC1 %08x\n", (i >> 2) + start - 0x180 + 0x40, data[i+1]); + fprintf(stderr, "R200_VS_PROG %d SRC2 %08x\n", (i >> 2) + start - 0x180 + 0x40, data[i+2]); + fprintf(stderr, "R200_VS_PROG %d SRC3 %08x\n", (i >> 2) + start - 0x180 + 0x40, data[i+3]); + } + } + else { + fprintf(stderr, "write to unknown vector area\n"); + } + + cmdbuf->buf += sz * sizeof(int); + cmdbuf->bufsz -= sz * sizeof(int); + return 0; +} + #if 0 static int print_vertex_format( int vfmt ) { @@ -1360,6 +1419,13 @@ int r200SanityCmdBuffer( r200ContextPtr rmesa, case RADEON_CMD_WAIT: break; + case RADEON_CMD_VECLINEAR: + if (radeon_emit_veclinear( header, &cmdbuf )) { + fprintf(stderr,"radeon_emit_veclinear failed\n"); + return -EINVAL; + } + break; + default: fprintf(stderr,"bad cmd_type %d at %p\n", header.header.cmd_type, diff --git a/src/mesa/drivers/dri/r200/r200_state.c b/src/mesa/drivers/dri/r200/r200_state.c index 6ffb48c1505..41c7607b61d 100644 --- a/src/mesa/drivers/dri/r200/r200_state.c +++ b/src/mesa/drivers/dri/r200/r200_state.c @@ -2110,18 +2110,18 @@ static void r200Enable( GLcontext *ctx, GLenum cap, GLboolean state ) if they didn't change) and restore tex coord routing */ GLuint unit; for (unit = 0; unit < R200_MAX_TEXTURE_UNITS; unit++) { + R200_STATECHANGE( rmesa, pix[unit] ); + R200_STATECHANGE( rmesa, tex[unit] ); rmesa->hw.tex[unit].cmd[TEX_PP_TXFORMAT] &= ~(R200_TXFORMAT_ST_ROUTE_MASK | R200_TXFORMAT_LOOKUP_DISABLE); rmesa->hw.tex[unit].cmd[TEX_PP_TXFORMAT] |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT; /* need to guard this with drmSupportsFragmentShader? Should never get here if we don't announce ATI_fs, right? */ rmesa->hw.tex[unit].cmd[TEX_PP_TXMULTI_CTL] = 0; - R200_STATECHANGE( rmesa, pix[unit] ); - R200_STATECHANGE( rmesa, tex[unit] ); } - rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0; R200_STATECHANGE( rmesa, cst ); R200_STATECHANGE( rmesa, tf ); + rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0; } else { /* need to mark this dirty as pix/tf atoms have overwritten the data |