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authorDave Airlie <[email protected]>2011-01-19 10:39:32 +1000
committerDave Airlie <[email protected]>2011-01-19 12:55:04 +1000
commitf7bab47e6c7cf877acf6d9bb85453851e5aa7f19 (patch)
tree913664f9f9d573c2922470886e69dbb615be4e10 /src/mesa/drivers/dri/r200
parent568e0083651dd29e5bce94ade8625a64a0e85e88 (diff)
radeon/r200: fix fbo-clearmipmap + gen-teximage
sw clears were being used and not getting the correct offsets in the span code. also not emitting correct offsets for CB draws to texture levels. (I've no idea why I'm playing with r100). This is a candidate for 7.9 and 7.10
Diffstat (limited to 'src/mesa/drivers/dri/r200')
-rw-r--r--src/mesa/drivers/dri/r200/r200_state_init.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_state_init.c b/src/mesa/drivers/dri/r200/r200_state_init.c
index f6afb90d595..e173cce0860 100644
--- a/src/mesa/drivers/dri/r200/r200_state_init.c
+++ b/src/mesa/drivers/dri/r200/r200_state_init.c
@@ -587,7 +587,7 @@ static void ctx_emit_cs(struct gl_context *ctx, struct radeon_state_atom *atom)
if (rrb) {
OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLOROFFSET, 0));
- OUT_BATCH_RELOC(0, rrb->bo, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+ OUT_BATCH_RELOC(rrb->draw_offset, rrb->bo, rrb->draw_offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
OUT_BATCH(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0));
OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);