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authorBrian Paul <[email protected]>2003-08-22 20:11:43 +0000
committerBrian Paul <[email protected]>2003-08-22 20:11:43 +0000
commit5df82c82bd53db90eb72c5aad4dd20cf6f1116b1 (patch)
treef04fc69df71104df2a4cec03346abc3d4c3f4bbb /src/mesa/drivers/dri/mga/mgaregs.h
parent1a84876d7907df90add3f59d3396ce0bbb905040 (diff)
patch to import Jon Smirl's work from Bitkeeper
Diffstat (limited to 'src/mesa/drivers/dri/mga/mgaregs.h')
-rw-r--r--src/mesa/drivers/dri/mga/mgaregs.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/mga/mgaregs.h b/src/mesa/drivers/dri/mga/mgaregs.h
index f07dc2de0be..e1291ca01bd 100644
--- a/src/mesa/drivers/dri/mga/mgaregs.h
+++ b/src/mesa/drivers/dri/mga/mgaregs.h
@@ -1052,6 +1052,7 @@
# define TMC_tformat_tw8a 0x7 /* val 7, shift 0 */
# define TMC_tformat_tw8al 0x8 /* val 8, shift 0 */
# define TMC_tformat_tw422 0xa /* val 10, shift 0 */
+# define TMC_tformat_tw422uyvy 0xb /* val 11, shift 0 */
# define TMC_tpitchlin_MASK 0xfffffeff /* bit 8 */
# define TMC_tpitchlin_disable 0x0
# define TMC_tpitchlin_enable 0x100
@@ -1137,6 +1138,13 @@
# define TF_magfilter_nrst 0x0 /* val 0, shift 4 */
# define TF_magfilter_bilin 0x20 /* val 2, shift 4 */
# define TF_magfilter_cnst 0x30 /* val 3, shift 4 */
+# define TF_uvoffset_SHIFT 17
+# define TF_uvoffset_OGL (0U << TF_uvoffset_SHIFT)
+# define TF_uvoffset_D3D (1U << TF_uvoffset_SHIFT)
+# define TF_uvoffset_MASK (~(1U << TF_uvoffset_SHIFT))
+# define TF_reserved_MASK (~0x1ff00) /* bits 8-16 */
+# define TF_mapnbhigh_SHIFT 18
+# define TF_mapnbhigh_MASK (~(1U << TF_mapnbhigh_SHIFT))
# define TF_avgstride_MASK 0xfff7ffff /* bit 19 */
# define TF_avgstride_disable 0x0
# define TF_avgstride_enable 0x80000
@@ -1377,5 +1385,11 @@
/**************** (END) AUTOMATICLY GENERATED REGISTER FILE ******************/
+/* Copied from mga_drv.h kernel file.
+ */
+
+#define MGA_ILOAD_ALIGN 64
+#define MGA_ILOAD_MASK (MGA_ILOAD_ALIGN - 1)
+
#endif /* _MGAREGS_H_ */