Merge branch 'master' into glsl2

8 files changed, 41 insertions, 428 deletions

diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 5f2035d79c9..e19f44035fd 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -29,6 +29,7 @@
 #include "main/glheader.h"
 #include "main/context.h"
 #include "main/extensions.h"
+#include "main/fbobject.h"
 #include "main/framebuffer.h"
 #include "main/imports.h"
 #include "main/points.h"
@@ -39,8 +40,6 @@
 #include "drivers/common/driverfuncs.h"
 #include "drivers/common/meta.h"
 
-#include "i830_dri.h"
-
 #include "intel_chipset.h"
 #include "intel_buffers.h"
 #include "intel_tex.h"
@@ -420,7 +419,7 @@ intel_prepare_render(struct intel_context *intel)
    __DRIdrawable *drawable;
 
    drawable = driContext->driDrawablePriv;
-   if (drawable->dri2.stamp != driContext->dri2.draw_stamp) {
+   if (drawable && drawable->dri2.stamp != driContext->dri2.draw_stamp) {
       if (drawable->lastStamp != drawable->dri2.stamp)
 	 intel_update_renderbuffers(driContext, drawable);
       intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
@@ -428,7 +427,7 @@ intel_prepare_render(struct intel_context *intel)
    }
 
    drawable = driContext->driReadablePriv;
-   if (drawable->dri2.stamp != driContext->dri2.read_stamp) {
+   if (drawable && drawable->dri2.stamp != driContext->dri2.read_stamp) {
       if (drawable->lastStamp != drawable->dri2.stamp)
 	 intel_update_renderbuffers(driContext, drawable);
       driContext->dri2.read_stamp = drawable->dri2.stamp;
@@ -613,6 +612,7 @@ intelInitContext(struct intel_context *intel,
    __DRIscreen *sPriv = driContextPriv->driScreenPriv;
    struct intel_screen *intelScreen = sPriv->private;
    int bo_reuse_mode;
+   __GLcontextModes visual;
 
    /* we can't do anything without a connection to the device */
    if (intelScreen->bufmgr == NULL)
@@ -624,6 +624,11 @@ intelInitContext(struct intel_context *intel,
       functions->Viewport = intel_viewport;
    }
 
+   if (mesaVis == NULL) {
+      memset(&visual, 0, sizeof visual);
+      mesaVis = &visual;
+   }
+
    if (!_mesa_initialize_context_for_api(&intel->ctx, api, mesaVis, shareCtx,
 					 functions, (void *) intel)) {
       printf("%s: failed to init mesa context\n", __FUNCTION__);
@@ -890,14 +895,21 @@ intelMakeCurrent(__DRIcontext * driContextPriv,
    }
 
    if (driContextPriv) {
-      struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
-      struct gl_framebuffer *readFb = driReadPriv->driverPrivate;
+      struct gl_framebuffer *fb, *readFb;
+      
+      if (driDrawPriv == NULL && driReadPriv == NULL) {
+	 fb = _mesa_get_incomplete_framebuffer();
+	 readFb = _mesa_get_incomplete_framebuffer();
+      } else {
+	 fb = driDrawPriv->driverPrivate;
+	 readFb = driReadPriv->driverPrivate;
+	 driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
+	 driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
+      }
 
-      driContextPriv->dri2.draw_stamp = driDrawPriv->dri2.stamp - 1;
-      driContextPriv->dri2.read_stamp = driReadPriv->dri2.stamp - 1;
       intel_prepare_render(intel);
       _mesa_make_current(&intel->ctx, fb, readFb);
-
+      
       /* We do this in intel_prepare_render() too, but intel->ctx.DrawBuffer
        * is NULL at that point.  We can't call _mesa_makecurrent()
        * first, since we need the buffer size for the initial
diff --git a/src/mesa/drivers/dri/intel/intel_extensions_es2.c b/src/mesa/drivers/dri/intel/intel_extensions_es2.c
index baf8e130010..de34bbb2aec 100644
--- a/src/mesa/drivers/dri/intel/intel_extensions_es2.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions_es2.c
@@ -28,7 +28,6 @@
 #include "main/extensions.h"
 
 #include "intel_extensions.h"
-#include "utils.h"
 
 static const char *es2_extensions[] = {
    /* Used by mesa internally (cf all_mesa_extensions in ../common/utils.c) */
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
index 0e2fe893fed..02c0ffce31d 100644
--- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
+++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c
@@ -45,6 +45,7 @@
 #include "main/attrib.h"
 #include "main/enable.h"
 #include "main/viewport.h"
+#include "main/context.h"
 #include "swrast/swrast.h"
 
 #include "intel_screen.h"
diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c
index fe4de189600..680d18ba299 100644
--- a/src/mesa/drivers/dri/intel/intel_regions.c
+++ b/src/mesa/drivers/dri/intel/intel_regions.c
@@ -155,6 +155,9 @@ intel_region_alloc_internal(struct intel_context *intel,
    }
 
    region = calloc(sizeof(*region), 1);
+   if (region == NULL)
+      return region;
+
    region->cpp = cpp;
    region->width = width;
    region->height = height;
@@ -189,6 +192,9 @@ intel_region_alloc(struct intel_context *intel,
 
    region = intel_region_alloc_internal(intel, cpp, width, height,
 					aligned_pitch / cpp, buffer);
+   if (region == NULL)
+      return region;
+
    region->tiling = tiling;
 
    return region;
diff --git a/src/mesa/drivers/dri/intel/intel_tex_copy.c b/src/mesa/drivers/dri/intel/intel_tex_copy.c
index 224b506c05b..6efb2ddc553 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_copy.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_copy.c
@@ -102,7 +102,7 @@ do_copy_texsubimage(struct intel_context *intel,
    GLcontext *ctx = &intel->ctx;
    const struct intel_region *src = get_teximage_source(intel, internalFormat);
 
-   if (!intelImage->mt || !src) {
+   if (!intelImage->mt || !src || !src->buffer) {
       if (INTEL_DEBUG & DEBUG_FALLBACKS)
 	 fprintf(stderr, "%s fail %p %p (0x%08x)\n",
 		 __FUNCTION__, intelImage->mt, src, internalFormat);
diff --git a/src/mesa/drivers/dri/intel/intel_tex_format.c b/src/mesa/drivers/dri/intel/intel_tex_format.c
index 5f813c0efa2..e03b203fb40 100644
--- a/src/mesa/drivers/dri/intel/intel_tex_format.c
+++ b/src/mesa/drivers/dri/intel/intel_tex_format.c
@@ -19,7 +19,6 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
                          GLenum format, GLenum type)
 {
    struct intel_context *intel = intel_context(ctx);
-   const GLboolean do32bpt = (intel->ctx.Visual.rgbBits >= 24);
 
 #if 0
    printf("%s intFmt=0x%x format=0x%x type=0x%x\n",
@@ -30,39 +29,28 @@ intelChooseTextureFormat(GLcontext * ctx, GLint internalFormat,
    case 4:
    case GL_RGBA:
    case GL_COMPRESSED_RGBA:
-      if (format == GL_BGRA) {
-         if (type == GL_UNSIGNED_BYTE || type == GL_UNSIGNED_INT_8_8_8_8_REV) {
-            return MESA_FORMAT_ARGB8888;
-         }
-         else if (type == GL_UNSIGNED_SHORT_4_4_4_4_REV) {
-            return MESA_FORMAT_ARGB4444;
-         }
-         else if (type == GL_UNSIGNED_SHORT_1_5_5_5_REV) {
-            return MESA_FORMAT_ARGB1555;
-         }
-      }
-      return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB4444;
+      if (type == GL_UNSIGNED_SHORT_4_4_4_4_REV)
+	 return MESA_FORMAT_ARGB4444;
+      else if (type == GL_UNSIGNED_SHORT_1_5_5_5_REV)
+	 return MESA_FORMAT_ARGB1555;
+      else
+	 return MESA_FORMAT_ARGB8888;
 
    case 3:
    case GL_RGB:
    case GL_COMPRESSED_RGB:
-      if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) {
-         return MESA_FORMAT_RGB565;
-      }
-      if (do32bpt) {
-	 if (intel->has_xrgb_textures)
-	    return MESA_FORMAT_XRGB8888;
-	 else
-	    return MESA_FORMAT_ARGB8888;
-      } else {
+      if (type == GL_UNSIGNED_SHORT_5_6_5)
 	 return MESA_FORMAT_RGB565;
-      }
+      else if (intel->has_xrgb_textures)
+	 return MESA_FORMAT_XRGB8888;
+      else
+	 return MESA_FORMAT_ARGB8888;
 
    case GL_RGBA8:
    case GL_RGB10_A2:
    case GL_RGBA12:
    case GL_RGBA16:
-      return do32bpt ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB4444;
+      return MESA_FORMAT_ARGB8888;
 
    case GL_RGBA4:
    case GL_RGBA2:
diff --git a/src/mesa/drivers/dri/intel/server/i830_dri.h b/src/mesa/drivers/dri/intel/server/i830_dri.h
deleted file mode 100644
index def049e7a6b..00000000000
--- a/src/mesa/drivers/dri/intel/server/i830_dri.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h,v 1.6 2003/09/28 20:15:59 alanh Exp $ */
-
-#ifndef _I830_DRI_H
-#define _I830_DRI_H
-
-#include "xf86drm.h"
-
-#define I830_MAX_DRAWABLES 256
-
-#define I830_MAJOR_VERSION 1
-#define I830_MINOR_VERSION 9
-#define I830_PATCHLEVEL 0
-
-#define I830_REG_SIZE 0x80000
-
-typedef struct _I830DRIRec {
-   drm_handle_t regs;
-   drmSize regsSize;
-
-   drmSize unused1; /* backbufferSize */
-   drm_handle_t unused2; /* backbuffer */
-
-   drmSize unused3; /* depthbufferSize */
-   drm_handle_t unused4; /* depthbuffer */
-
-   drmSize unused5; /* rotatedSize */
-   drm_handle_t unused6; /* rotatedbuffer */
-
-   drm_handle_t unused7; /* textures */
-   int unused8; /* textureSize */
-
-   drm_handle_t unused9; /* agp_buffers */
-   drmSize unused10; /* agp_buf_size */
-
-   int deviceID;
-   int width;
-   int height;
-   int mem;
-   int cpp;
-   int bitsPerPixel;
-
-   int unused11[8]; /* was front/back/depth/rotated offset/pitch */
-
-   int unused12; /* logTextureGranularity */
-   int unused13; /* textureOffset */
-
-   int irq;
-   int sarea_priv_offset;
-} I830DRIRec, *I830DRIPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830ConfigPrivRec, *I830ConfigPrivPtr;
-
-typedef struct {
-   /* Nothing here yet */
-   int dummy;
-} I830DRIContextRec, *I830DRIContextPtr;
-
-
-#endif
diff --git a/src/mesa/drivers/dri/intel/server/intel.h b/src/mesa/drivers/dri/intel/server/intel.h
deleted file mode 100644
index 6ea72499c1c..00000000000
--- a/src/mesa/drivers/dri/intel/server/intel.h
+++ /dev/null
@@ -1,331 +0,0 @@
-#ifndef _INTEL_H_
-#define _INTEL_H_
-
-#include "xf86drm.h"		/* drm_handle_t, etc */
-
-/* Intel */
-#ifndef PCI_CHIP_I810
-#define PCI_CHIP_I810              0x7121
-#define PCI_CHIP_I810_DC100        0x7123
-#define PCI_CHIP_I810_E            0x7125
-#define PCI_CHIP_I815              0x1132
-#define PCI_CHIP_I810_BRIDGE       0x7120
-#define PCI_CHIP_I810_DC100_BRIDGE 0x7122
-#define PCI_CHIP_I810_E_BRIDGE     0x7124
-#define PCI_CHIP_I815_BRIDGE       0x1130
-#endif
-
-#define PCI_CHIP_845_G			0x2562
-#define PCI_CHIP_I830_M			0x3577
-
-#ifndef PCI_CHIP_I855_GM
-#define PCI_CHIP_I855_GM	   0x3582
-#define PCI_CHIP_I855_GM_BRIDGE	   0x3580
-#endif
-
-#ifndef PCI_CHIP_I865_G
-#define PCI_CHIP_I865_G		   0x2572
-#define PCI_CHIP_I865_G_BRIDGE	   0x2570
-#endif
-
-#ifndef PCI_CHIP_I915_G
-#define PCI_CHIP_I915_G		   0x2582
-#define PCI_CHIP_I915_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I915_GM
-#define PCI_CHIP_I915_GM	   0x2592
-#define PCI_CHIP_I915_GM_BRIDGE	   0x2590
-#endif
-
-#ifndef PCI_CHIP_E7221_G
-#define PCI_CHIP_E7221_G	   0x258A
-/* Same as I915_G_BRIDGE */
-#define PCI_CHIP_E7221_G_BRIDGE	   0x2580
-#endif
-
-#ifndef PCI_CHIP_I945_G
-#define PCI_CHIP_I945_G        0x2772
-#define PCI_CHIP_I945_G_BRIDGE 0x2770
-#endif
-
-#ifndef PCI_CHIP_I945_GM
-#define PCI_CHIP_I945_GM        0x27A2
-#define PCI_CHIP_I945_GM_BRIDGE 0x27A0
-#endif
-
-#define IS_I810(pI810) (pI810->Chipset == PCI_CHIP_I810 ||	\
-			pI810->Chipset == PCI_CHIP_I810_DC100 || \
-			pI810->Chipset == PCI_CHIP_I810_E)
-#define IS_I815(pI810) (pI810->Chipset == PCI_CHIP_I815)
-#define IS_I830(pI810) (pI810->Chipset == PCI_CHIP_I830_M)
-#define IS_845G(pI810) (pI810->Chipset == PCI_CHIP_845_G)
-#define IS_I85X(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM)
-#define IS_I852(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
-#define IS_I855(pI810)  (pI810->Chipset == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
-#define IS_I865G(pI810) (pI810->Chipset == PCI_CHIP_I865_G)
-
-#define IS_I915G(pI810) (pI810->Chipset == PCI_CHIP_I915_G || pI810->Chipset == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (pI810->Chipset == PCI_CHIP_I915_GM)
-#define IS_I945G(pI810) (pI810->Chipset == PCI_CHIP_I945_G)
-#define IS_I945GM(pI810) (pI810->Chipset == PCI_CHIP_I945_GM)
-#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810))
-
-#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810))
-
-#define I830_GMCH_CTRL		0x52
-
-#define I830_GMCH_MEM_MASK      0x1
-#define I830_GMCH_MEM_64M       0x1
-#define I830_GMCH_MEM_128M      0
-
-#define I830_GMCH_GMS_MASK			0x70
-#define I830_GMCH_GMS_DISABLED		0x00
-#define I830_GMCH_GMS_LOCAL			0x10
-#define I830_GMCH_GMS_STOLEN_512	0x20
-#define I830_GMCH_GMS_STOLEN_1024	0x30
-#define I830_GMCH_GMS_STOLEN_8192	0x40
-
-#define I855_GMCH_GMS_MASK			(0x7 << 4)
-#define I855_GMCH_GMS_DISABLED			0x00
-#define I855_GMCH_GMS_STOLEN_1M			(0x1 << 4)
-#define I855_GMCH_GMS_STOLEN_4M			(0x2 << 4)
-#define I855_GMCH_GMS_STOLEN_8M			(0x3 << 4)
-#define I855_GMCH_GMS_STOLEN_16M		(0x4 << 4)
-#define I855_GMCH_GMS_STOLEN_32M		(0x5 << 4)
-#define I915G_GMCH_GMS_STOLEN_48M		(0x6 << 4)
-#define I915G_GMCH_GMS_STOLEN_64M		(0x7 << 4)
-
-typedef unsigned char Bool;
-#define TRUE 1
-#define FALSE 0
-
-#define PIPE_NONE	0<<0
-#define PIPE_CRT	1<<0
-#define PIPE_TV		1<<1
-#define PIPE_DFP	1<<2
-#define PIPE_LFP	1<<3
-#define PIPE_CRT2	1<<4
-#define PIPE_TV2	1<<5
-#define PIPE_DFP2	1<<6
-#define PIPE_LFP2	1<<7
-
-typedef struct _I830MemPool *I830MemPoolPtr;
-typedef struct _I830MemRange *I830MemRangePtr;
-typedef struct _I830MemRange {
-   long Start;
-   long End;
-   long Size;
-   unsigned long Physical;
-   unsigned long Offset;		/* Offset of AGP-allocated portion */
-   unsigned long Alignment;
-   drm_handle_t Key;
-   unsigned long Pitch; // add pitch
-   I830MemPoolPtr Pool;
-} I830MemRange;
-
-typedef struct _I830MemPool {
-   I830MemRange Total;
-   I830MemRange Free;
-   I830MemRange Fixed;
-   I830MemRange Allocated;
-} I830MemPool;
-
-typedef struct {
-   int tail_mask;
-   I830MemRange mem;
-   unsigned char *virtual_start;
-   int head;
-   int tail;
-   int space;
-} I830RingBuffer;
-
-typedef struct _I830Rec {
-   unsigned char *MMIOBase;
-   unsigned char *FbBase;
-   int cpp;
-   uint32_t aper_size;
-   unsigned int bios_version;
-
-   /* These are set in PreInit and never changed. */
-   long FbMapSize;
-   long TotalVideoRam;
-   I830MemRange StolenMemory;		/* pre-allocated memory */
-   long BIOSMemorySize;			/* min stolen pool size */
-   int BIOSMemSizeLoc;
-
-   /* These change according to what has been allocated. */
-   long FreeMemory;
-   I830MemRange MemoryAperture;
-   I830MemPool StolenPool;
-   long allocatedMemory;
-
-   /* Regions allocated either from the above pools, or from agpgart. */
-   /* for single and dual head configurations */
-   I830MemRange FrontBuffer;
-   I830MemRange FrontBuffer2;
-   I830MemRange Scratch;
-   I830MemRange Scratch2;
-
-   I830RingBuffer *LpRing;
-
-   I830MemRange BackBuffer;
-   I830MemRange DepthBuffer;
-   I830MemRange TexMem;
-   int TexGranularity;
-   I830MemRange ContextMem;
-   int drmMinor;
-   Bool have3DWindows;
-
-   Bool NeedRingBufferLow;
-   Bool allowPageFlip;
-   Bool disableTiling;
-
-   int Chipset;
-   unsigned long LinearAddr;
-   unsigned long MMIOAddr;
-
-   drmSize           registerSize;     /**< \brief MMIO register map size */
-   drm_handle_t         registerHandle;   /**< \brief MMIO register map handle */
-  //   IOADDRESS ioBase;
-   int               irq;              /**< \brief IRQ number */
-   int GttBound;
-
-   drm_handle_t ring_map;
-   unsigned int Fence[8];
-
-} I830Rec;
-
-/*
- * 12288 is set as the maximum, chosen because it is enough for
- * 1920x1440@32bpp with a 2048 pixel line pitch with some to spare.
- */
-#define I830_MAXIMUM_VBIOS_MEM		12288
-#define I830_DEFAULT_VIDEOMEM_2D	(MB(32) / 1024)
-#define I830_DEFAULT_VIDEOMEM_3D	(MB(64) / 1024)
-
-/* Flags for memory allocation function */
-#define FROM_ANYWHERE			0x00000000
-#define FROM_POOL_ONLY			0x00000001
-#define FROM_NEW_ONLY			0x00000002
-#define FROM_MASK			0x0000000f
-
-#define ALLOCATE_AT_TOP			0x00000010
-#define ALLOCATE_AT_BOTTOM		0x00000020
-#define FORCE_GAPS			0x00000040
-
-#define NEED_PHYSICAL_ADDR		0x00000100
-#define ALIGN_BOTH_ENDS			0x00000200
-#define FORCE_LOW			0x00000400
-
-#define ALLOC_NO_TILING			0x00001000
-#define ALLOC_INITIAL			0x00002000
-
-#define ALLOCATE_DRY_RUN		0x80000000
-
-/* Chipset registers for VIDEO BIOS memory RW access */
-#define _855_DRAM_RW_CONTROL 0x58
-#define _845_DRAM_RW_CONTROL 0x90
-#define DRAM_WRITE    0x33330000
-
-#define KB(x) ((x) * 1024)
-#define MB(x) ((x) * KB(1024))
-
-#define GTT_PAGE_SIZE			KB(4)
-#define ROUND_TO(x, y)			(((x) + (y) - 1) / (y) * (y))
-#define ROUND_DOWN_TO(x, y)		((x) / (y) * (y))
-#define ROUND_TO_PAGE(x)		ROUND_TO((x), GTT_PAGE_SIZE)
-#define ROUND_TO_MB(x)			ROUND_TO((x), MB(1))
-#define PRIMARY_RINGBUFFER_SIZE		KB(128)
-
-
-/* Ring buffer registers, p277, overview p19
- */
-#define LP_RING     0x2030
-#define HP_RING     0x2040
-
-#define RING_TAIL      0x00
-#define TAIL_ADDR           0x000FFFF8
-#define I830_TAIL_MASK	    0x001FFFF8
-
-#define RING_HEAD      0x04
-#define HEAD_WRAP_COUNT     0xFFE00000
-#define HEAD_WRAP_ONE       0x00200000
-#define HEAD_ADDR           0x001FFFFC
-#define I830_HEAD_MASK      0x001FFFFC
-
-#define RING_START     0x08
-#define START_ADDR          0x03FFFFF8
-#define I830_RING_START_MASK	0xFFFFF000
-
-#define RING_LEN       0x0C
-#define RING_NR_PAGES       0x001FF000 
-#define I830_RING_NR_PAGES	0x001FF000
-#define RING_REPORT_MASK    0x00000006
-#define RING_REPORT_64K     0x00000002
-#define RING_REPORT_128K    0x00000004
-#define RING_NO_REPORT      0x00000000
-#define RING_VALID_MASK     0x00000001
-#define RING_VALID          0x00000001
-#define RING_INVALID        0x00000000
-
-
-/* Fence/Tiling ranges [0..7]
- */
-#define FENCE            0x2000
-#define FENCE_NR         8
-
-#define I915G_FENCE_START_MASK	0x0ff00000
-
-#define I830_FENCE_START_MASK	0x07f80000
-
-#define FENCE_START_MASK    0x03F80000
-#define FENCE_X_MAJOR       0x00000000
-#define FENCE_Y_MAJOR       0x00001000
-#define FENCE_SIZE_MASK     0x00000700
-#define FENCE_SIZE_512K     0x00000000
-#define FENCE_SIZE_1M       0x00000100
-#define FENCE_SIZE_2M       0x00000200
-#define FENCE_SIZE_4M       0x00000300
-#define FENCE_SIZE_8M       0x00000400
-#define FENCE_SIZE_16M      0x00000500
-#define FENCE_SIZE_32M      0x00000600
-#define FENCE_SIZE_64M	    0x00000700
-#define I915G_FENCE_SIZE_1M       0x00000000
-#define I915G_FENCE_SIZE_2M       0x00000100
-#define I915G_FENCE_SIZE_4M       0x00000200
-#define I915G_FENCE_SIZE_8M       0x00000300
-#define I915G_FENCE_SIZE_16M      0x00000400
-#define I915G_FENCE_SIZE_32M      0x00000500
-#define I915G_FENCE_SIZE_64M	0x00000600
-#define I915G_FENCE_SIZE_128M	0x00000700
-#define FENCE_PITCH_1       0x00000000
-#define FENCE_PITCH_2       0x00000010
-#define FENCE_PITCH_4       0x00000020
-#define FENCE_PITCH_8       0x00000030
-#define FENCE_PITCH_16      0x00000040
-#define FENCE_PITCH_32      0x00000050
-#define FENCE_PITCH_64	    0x00000060
-#define FENCE_VALID         0x00000001
-
-#include <mmio.h>
-
-#  define MMIO_IN8(base, offset) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset))
-#  define MMIO_IN32(base, offset) \
-	read_MMIO_LE32(base, offset)
-#  define MMIO_OUT8(base, offset, val) \
-	*(volatile unsigned char *)(((unsigned char*)(base)) + (offset)) = (val)
-#  define MMIO_OUT32(base, offset, val) \
-	*(volatile unsigned int *)(void *)(((unsigned char*)(base)) + (offset)) = CPU_TO_LE32(val)
-
-
-				/* Memory mapped register access macros */
-#define INREG8(addr)        MMIO_IN8(MMIO, addr)
-#define INREG(addr)         MMIO_IN32(MMIO, addr)
-#define OUTREG8(addr, val)  MMIO_OUT8(MMIO, addr, val)
-#define OUTREG(addr, val)   MMIO_OUT32(MMIO, addr, val)
-
-#define DSPABASE		0x70184
-
-#endif