diff options
author | Brian Paul <[email protected]> | 2009-09-09 09:00:58 -0600 |
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committer | Brian Paul <[email protected]> | 2009-09-09 09:00:58 -0600 |
commit | 7bf63473623e01933adc0e8f4464eda8f2860564 (patch) | |
tree | 4cfb1b611c999c4b158e6809ee78a02e4d7698b5 /src/mesa/drivers/dri/intel | |
parent | 94a8157ef6bf6695cdc66325c9a7698e64f3e37e (diff) | |
parent | 0c309bb494b6ee1c403442d1207743f749f95b6e (diff) |
Merge branch 'mesa_7_6_branch'
Diffstat (limited to 'src/mesa/drivers/dri/intel')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_pixel_read.c | 13 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_regions.c | 7 |
2 files changed, 20 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_pixel_read.c b/src/mesa/drivers/dri/intel/intel_pixel_read.c index bc67f6242a1..aef760c015b 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_read.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_read.c @@ -252,6 +252,7 @@ do_blit_readpixels(GLcontext * ctx, if (!intel_intersect_cliprects(&rect, &src_rect, &box[i])) continue; +<<<<<<< HEAD:src/mesa/drivers/dri/intel/intel_pixel_read.c if (!intelEmitCopyBlit(intel, src->cpp, src->pitch, src->buffer, 0, src->tiling, @@ -265,6 +266,18 @@ do_blit_readpixels(GLcontext * ctx, UNLOCK_HARDWARE(intel); return GL_FALSE; } +======= + intelEmitCopyBlit(intel, + src->cpp, + src->pitch, src->buffer, 0, src->tiling, + rowLength, dst_buffer, dst_offset, GL_FALSE, + rect.x1, + rect.y1, + rect.x1 - src_rect.x1, + rect.y2 - src_rect.y2, + rect.x2 - rect.x1, rect.y2 - rect.y1, + GL_COPY); +>>>>>>> mesa_7_5_branch:src/mesa/drivers/dri/intel/intel_pixel_read.c } } UNLOCK_HARDWARE(intel); diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 068a3f33797..a86c66a8443 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -196,6 +196,13 @@ intel_region_alloc(struct intel_context *intel, else height = ALIGN(height, 2); + /* If we're untiled, we have to align to 2 rows high because the + * data port accesses 2x2 blocks even if the bottom row isn't to be + * rendered, so failure to align means we could walk off the end of the + * GTT and fault. + */ + height = ALIGN(height, 2); + if (expect_accelerated_upload) { buffer = drm_intel_bo_alloc_for_render(intel->bufmgr, "region", pitch * cpp * height, 64); |