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authorEric Anholt <[email protected]>2011-06-09 09:28:19 -0700
committerEric Anholt <[email protected]>2011-06-14 11:17:26 -0700
commit4a60b0c8d2e4890038e1c6a72a7dac3b4cdf996e (patch)
tree16811c06ede9af4290cb5945a3bd1d86e16c9a6d /src/mesa/drivers/dri/intel/intel_mipmap_tree.c
parentd5809115b568d8b74f47316607dce0730964517a (diff)
intel: Add block alignment for RGTC textures.
We were using the default 4x2 alignment instead of the 4x4 required for RGTC textures.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_mipmap_tree.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index a96398cc5de..c8ad1a7d34d 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -402,8 +402,7 @@ intel_miptree_image_data(struct intel_context *intel,
if (dst->compressed) {
unsigned int align_w, align_h;
- intel_get_texture_alignment_unit(dst->internal_format,
- &align_w, &align_h);
+ intel_get_texture_alignment_unit(dst->format, &align_w, &align_h);
height = (height + align_h - 1) / align_h;
width = ALIGN(width, align_w);
}
@@ -445,8 +444,7 @@ intel_miptree_image_copy(struct intel_context *intel,
if (dst->compressed) {
GLuint align_w, align_h;
- intel_get_texture_alignment_unit(dst->internal_format,
- &align_w, &align_h);
+ intel_get_texture_alignment_unit(dst->format, &align_w, &align_h);
height = (height + 3) / 4;
width = ALIGN(width, align_w);
}