diff options
author | Paul Berry <[email protected]> | 2012-04-29 21:41:42 -0700 |
---|---|---|
committer | Paul Berry <[email protected]> | 2012-05-15 15:09:23 -0700 |
commit | 19e9b24626c2b9d7abef054d57bb2a52106c545b (patch) | |
tree | 400b049b32a91ad064f94dadd38929f6a65b6768 /src/mesa/drivers/dri/intel/intel_fbo.c | |
parent | 506d70be21cd3469118de89297cba0c0f709c1ae (diff) |
i965/gen6: Initial implementation of MSAA.
This patch enables MSAA for Gen6, by modifying intel_mipmap_tree to
understand multisampled buffers, adapting the rendering pipeline setup
to enable multisampled rendering, and adding multisample resolve
operations to brw_blorp_blit.cpp. Some preparation work is also
included for Gen7, but it is not yet enabled.
MSAA support is still fairly preliminary. In particular, the
following are not yet supported:
- Fully general blits between MSAA and non-MSAA buffers.
- Formats other than RGBA8, DEPTH24, and STENCIL8.
- Centroid interpolation.
- Coverage parameters (glSampleCoverage, GL_SAMPLE_ALPHA_TO_COVERAGE,
GL_SAMPLE_ALPHA_TO_ONE, GL_SAMPLE_COVERAGE, GL_SAMPLE_COVERAGE_VALUE,
GL_SAMPLE_COVERAGE_INVERT).
Fixes piglit tests "EXT_framebuffer_multisample/accuracy" on
i965/Gen6.
v2:
- In intel_alloc_renderbuffer_storage(), quantize the requested number
of samples to the next higher sample count supported by the
hardware. This ensures that a query of GL_SAMPLES will return the
correct value. It also ensures that MSAA is fully disabled on Gen7
for now (since Gen7 MSAA support doesn't work yet).
- When reading from a non-MSAA surface, ensure that s_is_zero is true
so that we won't try to read from a nonexistent sample.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_fbo.c')
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 31 |
1 files changed, 28 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index f92d78f378a..bbd5f6652e9 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -189,6 +189,29 @@ intel_unmap_renderbuffer(struct gl_context *ctx, /** + * Round up the requested multisample count to the next supported sample size. + */ +static unsigned +quantize_num_samples(struct intel_context *intel, unsigned num_samples) +{ + switch (intel->gen) { + case 6: + /* Gen6 supports only 4x multisampling. */ + if (num_samples > 0) + return 4; + else + return 0; + case 7: + /* TODO: MSAA only implemented on Gen6 */ + return 0; + default: + /* MSAA unsupported */ + return 0; + } +} + + +/** * Called via glRenderbufferStorageEXT() to set the format and allocate * storage for a user-created renderbuffer. */ @@ -199,6 +222,7 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer { struct intel_context *intel = intel_context(ctx); struct intel_renderbuffer *irb = intel_renderbuffer(rb); + rb->NumSamples = quantize_num_samples(intel, rb->NumSamples); ASSERT(rb->Name != 0); @@ -241,12 +265,13 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer return true; irb->mt = intel_miptree_create_for_renderbuffer(intel, rb->Format, - width, height); + width, height, + rb->NumSamples); if (!irb->mt) return false; if (intel->vtbl.is_hiz_depth_format(intel, rb->Format)) { - bool ok = intel_miptree_alloc_hiz(intel, irb->mt); + bool ok = intel_miptree_alloc_hiz(intel, irb->mt, rb->NumSamples); if (!ok) { intel_miptree_release(&irb->mt); return false; @@ -495,7 +520,7 @@ intel_renderbuffer_update_wrapper(struct intel_context *intel, if (mt->hiz_mt == NULL && intel->vtbl.is_hiz_depth_format(intel, rb->Format)) { - intel_miptree_alloc_hiz(intel, mt); + intel_miptree_alloc_hiz(intel, mt, 0 /* num_samples */); if (!mt->hiz_mt) return false; } |