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| author | Eric Anholt <[email protected]> | 2010-03-10 10:38:20 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2010-03-16 11:56:21 -0700 |
| commit | 7ee4db50b10ab2d8fdfc4781f26b84041cf568d7 (patch) | |
| tree | 188a4f70aa2f9f40ced17b97e2e26a03c7f96300 /src/mesa/drivers/dri/intel/intel_extensions.c | |
| parent | c1c9fad293eed751668fe2b34ff611af8d268131 (diff) | |
i965: Fix the response len of masked sampler messages for 8-wide dispatch.
The bad response length would hang the GPU with a masked sample in a
shader using control flow. For 8-wide, the response length is always
4, and masked slots are just not written to. brw_wm_glsl.c already
allocates registers in the right locations.
Fixes piglit glsl-fs-bug25902 (fd.o bug #25902).
(cherry picked from commit f6d210c284751ac50a8d6358de7e75a1ff1e4ac7)
(cherry picked from commit dc8c0359448cdae7b367552ba58783c04b199778)
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_extensions.c')
0 files changed, 0 insertions, 0 deletions