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authorEric Anholt <[email protected]>2011-04-25 10:36:29 -0700
committerEric Anholt <[email protected]>2011-04-27 09:48:26 -0700
commitaa3e1c25d3e4fc7e79236c717deaa838182e68c9 (patch)
tree33634ffb284e12e38171e6c287a9e293f70299bf /src/mesa/drivers/dri/intel/intel_context.c
parent66d95919d55098b96281e5144b6839627ad3d053 (diff)
Revert "intel: use throttle ioctl for throttling"
This reverts commit 50ade6ea697953bb17e3ca7210515fbd0411cd1e. Fixes jerky rendering again on apps that don't block on the GPU per frame and are GPU bound (e.g. 3DMMES on Ironlake). The whole point of this complicated throttle scheme is to wait on frame n-1 to have started rendering before starting frame n's rendering. Otherwise, the GPU-bound app will race ahead and call the GL to draw many nearly-identical frames, then >0ms later get stuck waiting for them (all dispatched at about the same time) to retire, then render a new batch of nearly-identical frames.
Diffstat (limited to 'src/mesa/drivers/dri/intel/intel_context.c')
-rw-r--r--src/mesa/drivers/dri/intel/intel_context.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c
index 447fbe5bae1..acdf35fc71b 100644
--- a/src/mesa/drivers/dri/intel/intel_context.c
+++ b/src/mesa/drivers/dri/intel/intel_context.c
@@ -466,9 +466,11 @@ intel_prepare_render(struct intel_context *intel)
* the swap, and getting our hands on that doesn't seem worth it,
* so we just us the first batch we emitted after the last swap.
*/
- if (intel->need_throttle) {
- drmCommandNone(intel->driFd, DRM_I915_GEM_THROTTLE);
- intel->need_throttle = GL_FALSE;
+ if (intel->need_throttle && intel->first_post_swapbuffers_batch) {
+ drm_intel_bo_wait_rendering(intel->first_post_swapbuffers_batch);
+ drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
+ intel->first_post_swapbuffers_batch = NULL;
+ intel->need_throttle = GL_FALSE;
}
}
@@ -938,6 +940,8 @@ intelDestroyContext(__DRIcontext * driContextPriv)
intel->prim.vb = NULL;
drm_intel_bo_unreference(intel->prim.vb_bo);
intel->prim.vb_bo = NULL;
+ drm_intel_bo_unreference(intel->first_post_swapbuffers_batch);
+ intel->first_post_swapbuffers_batch = NULL;
driDestroyOptionCache(&intel->optionCache);