diff options
author | Xiang, Haihao <[email protected]> | 2008-08-05 10:18:56 +0800 |
---|---|---|
committer | Xiang, Haihao <[email protected]> | 2008-08-05 10:18:56 +0800 |
commit | a3024caff1c790cf9f24476926aa62198f1e7b53 (patch) | |
tree | 3d03ae29e6611f3c71d937e20a525639d6be4316 /src/mesa/drivers/dri/i965 | |
parent | 62fb5f7b9ab70017d5de6ab3d0886bc4cbdbc57f (diff) |
i965: Use program->SamplerUnits[] to get the appropriate texture unit.
inst->TexSrcUnit is used as an index into program->SamplerUnits[] since
the commit ade508312c701ce89d3c2cd717994dbbabb4f207, and program->SamplerUnits
is a sampler-to-texture-unit mapping.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_fp.c | 11 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_glsl.c | 14 |
2 files changed, 15 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index ef90260e2a0..61805ec0809 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -562,6 +562,7 @@ static void precalc_tex( struct brw_wm_compile *c, { struct prog_src_register coord; struct prog_dst_register tmpcoord; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; if (inst->TexSrcTarget == TEXTURE_CUBE_INDEX) { struct prog_instruction *out; @@ -618,7 +619,7 @@ static void precalc_tex( struct brw_wm_compile *c, search_or_add_param5( c, STATE_INTERNAL, STATE_TEXRECT_SCALE, - inst->TexSrcUnit, + unit, 0,0 ); tmpcoord = get_temp(c); @@ -644,19 +645,19 @@ static void precalc_tex( struct brw_wm_compile *c, * conversion requires allocating a temporary variable which we * don't have the facility to do that late in the compilation. */ - if (!(c->key.yuvtex_mask & (1<<inst->TexSrcUnit))) { + if (!(c->key.yuvtex_mask & (1<<unit))) { emit_op(c, OPCODE_TEX, inst->DstReg, inst->SaturateMode, - inst->TexSrcUnit, + unit, inst->TexSrcTarget, coord, src_undef(), src_undef()); } else { - GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<inst->TexSrcUnit); + GLboolean swap_uv = c->key.yuvtex_swap_mask & (1<<unit); /* CONST C0 = { -.5, -.0625, -.5, 1.164 } @@ -682,7 +683,7 @@ static void precalc_tex( struct brw_wm_compile *c, OPCODE_TEX, tmp, inst->SaturateMode, - inst->TexSrcUnit, + unit, inst->TexSrcTarget, coord, src_undef(), diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c index faa2837fa01..305100f8833 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c +++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c @@ -998,6 +998,8 @@ static void emit_txb(struct brw_wm_compile *c, { struct brw_compile *p = &c->func; struct brw_reg dst[4], src[4], payload_reg; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + GLuint i; payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0); for (i = 0; i < 4; i++) @@ -1029,8 +1031,8 @@ static void emit_txb(struct brw_wm_compile *c, retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW), 1, retype(payload_reg, BRW_REGISTER_TYPE_UW), - inst->TexSrcUnit + MAX_DRAW_BUFFERS, /* surface */ - inst->TexSrcUnit, /* sampler */ + unit + MAX_DRAW_BUFFERS, /* surface */ + unit, /* sampler */ inst->DstReg.WriteMask, BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS, 4, @@ -1043,10 +1045,12 @@ static void emit_tex(struct brw_wm_compile *c, { struct brw_compile *p = &c->func; struct brw_reg dst[4], src[4], payload_reg; + GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit]; + GLuint msg_len; GLuint i, nr; GLuint emit; - GLboolean shadow = (c->key.shadowtex_mask & (1<<inst->TexSrcUnit)) ? 1 : 0; + GLboolean shadow = (c->key.shadowtex_mask & (1<<unit)) ? 1 : 0; payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0); @@ -1091,8 +1095,8 @@ static void emit_tex(struct brw_wm_compile *c, retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW), 1, retype(payload_reg, BRW_REGISTER_TYPE_UW), - inst->TexSrcUnit + MAX_DRAW_BUFFERS, /* surface */ - inst->TexSrcUnit, /* sampler */ + unit + MAX_DRAW_BUFFERS, /* surface */ + unit, /* sampler */ inst->DstReg.WriteMask, BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE, 4, |