diff options
| author | Chad Versace <[email protected]> | 2011-11-23 10:06:46 -0800 |
|---|---|---|
| committer | Chad Versace <[email protected]> | 2011-11-23 11:03:31 -0800 |
| commit | f99d5af03b0f97d7a1b7076b2142069770879471 (patch) | |
| tree | 5435a191f74bf03aca89dc455ea727b1d2a188b1 /src/mesa/drivers/dri/i965 | |
| parent | 8d15268a61fe400668495e6cb42c4d15e8b17cbb (diff) | |
i965/gen6: Fix GPU hang when using stencil buffer without depth
Enable the bit 3DSTATE_DEPTH_BUFFER.Tiled_Surface. From the Sandybridge
PRM, Volume 2, Part 1, Section 7.5.5.1.1 3DSTATE_DEPTH_BUFFER, Bit 1.27
Tiled Surface:
[DevGT+]: This field must be set to TRUE.
Fixes GPU hangs on the following Piglit tests:
hiz-stencil-test-fbo-d0-s8
hiz-stencil-read-fbo-d0-s8
Reviewed-by: Kenneth Graunke <[email protected]>
Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 17da46099ed..cb1405ca866 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -278,6 +278,10 @@ static void emit_depthbuffer(struct brw_context *brw) * * [DevGT]: This field must be set to the same value (enabled or * disabled) as Hierarchical Depth Buffer Enable + * + * The tiled bit must be set. From the Sandybridge PRM, Volume 2, Part 1, + * Section 7.5.5.1.1 3DSTATE_DEPTH_BUFFER, Bit 1.27 Tiled Surface: + * [DevGT+]: This field must be set to TRUE. */ struct intel_region *region = stencil_irb->mt->region; @@ -290,6 +294,7 @@ static void emit_depthbuffer(struct brw_context *brw) (1 << 21) | /* separate stencil enable */ (1 << 22) | /* hiz enable */ (BRW_TILEWALK_YMAJOR << 26) | + (1 << 27) | /* tiled surface */ (BRW_SURFACE_2D << 29)); OUT_BATCH(0); OUT_BATCH(((region->width - 1) << 6) | |