diff options
| author | Lionel Landwerlin <[email protected]> | 2018-07-07 14:06:22 +0100 |
|---|---|---|
| committer | Lionel Landwerlin <[email protected]> | 2018-07-07 20:54:55 +0100 |
| commit | 420bf14e12f7e55637cfc79da17990bb4f150288 (patch) | |
| tree | 24406f72ceb95af8697a700cdd55b149f4456370 /src/mesa/drivers/dri/i965 | |
| parent | 1a1f2b134c4bdb502659724e232a9e009287fe58 (diff) | |
i965: fix clear color bo address relocation
Fixes: 7987d041fda0c9 ("i965/surface_state: Emit the clear color address instead of value.")
Signed-off-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 73cae9ef7c5..9397b637c79 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -220,7 +220,7 @@ brw_emit_surface_state(struct brw_context *brw, if (clear_bo != NULL) { /* Make sure the offset is aligned with a cacheline. */ assert((clear_offset & 0x3f) == 0); - uint32_t *clear_address = + uint64_t *clear_address = state + brw->isl_dev.ss.clear_color_state_offset; *clear_address = brw_state_reloc(&brw->batch, *surf_offset + |