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authorAnuj Phogat <[email protected]>2015-08-11 16:36:44 -0700
committerAnuj Phogat <[email protected]>2015-09-28 12:43:43 -0700
commit0bfd914f9f02c85a4ad8e6892f1a31e37c14f2b2 (patch)
tree7974c3004b2182e28228efa35abde1a24e9db6de /src/mesa/drivers/dri/i965
parent0fa39bff19dc2fbd3c184bd0e1267c86bd5040d9 (diff)
i965/gen9: Fix {src, dst}_pitch alignment check for XY_FAST_COPY_BLT
I misinterpreted the alignmnet restriction in XY_FAST_COPY_BLT earlier. Instead of checking pitch for 64KB alignmnet we need to check it for tile widh alignment. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c18
1 files changed, 7 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 0cd2a203cb3..9184ad62e34 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -439,14 +439,6 @@ can_fast_copy_blit(struct brw_context *brw,
(dst_tiling_none && dst_pitch % 16 != 0))
return false;
- /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
- * (X direction width of the Tile). This means the pitch value will
- * always be Cache Line aligned (64byte multiple).
- */
- if ((!dst_tiling_none && dst_pitch % 64 != 0) ||
- (!src_tiling_none && src_pitch % 64 != 0))
- return false;
-
return true;
}
@@ -555,6 +547,13 @@ intelEmitCopyBlit(struct brw_context *brw,
intel_get_tile_dims(src_tiling, src_tr_mode, cpp, &src_tile_w, &src_tile_h);
intel_get_tile_dims(dst_tiling, dst_tr_mode, cpp, &dst_tile_w, &dst_tile_h);
+ /* For Tiled surfaces, the pitch has to be a multiple of the Tile width
+ * (X direction width of the Tile). This is ensured while allocating the
+ * buffer object.
+ */
+ assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
+ assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
+
use_fast_copy_blit = can_fast_copy_blit(brw,
src_buffer,
src_x, src_y,
@@ -593,9 +592,6 @@ intelEmitCopyBlit(struct brw_context *brw,
cpp, use_fast_copy_blit);
} else {
- assert(src_tiling == I915_TILING_NONE || (src_pitch % src_tile_w) == 0);
- assert(dst_tiling == I915_TILING_NONE || (dst_pitch % dst_tile_w) == 0);
-
/* For big formats (such as floating point), do the copy using 16 or
* 32bpp and multiply the coordinates.
*/