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authorSamuel Iglesias Gonsálvez <[email protected]>2016-05-26 07:56:38 +0200
committerSamuel Iglesias Gonsálvez <[email protected]>2016-06-06 12:37:16 +0200
commitcb30727648fea301cfff1647d947bfab540c3bf6 (patch)
tree7e06531538e2b0b2ada6eb91648eae1425173da7 /src/mesa/drivers/dri/i965
parent4c863993780a11cea6f88fa0682796bee5794042 (diff)
i965/fs: fix FS_OPCODE_CINTERP for unpacked double input varyings
Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not 64-bit aligned and the current implementation fails to read the data properly. Instead, when there is is a double input varying, read it as vector of floats with twice the number of components. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Cc: "12.0" <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp13
1 files changed, 12 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 366d9ffbffb..4b29ee52883 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1189,7 +1189,18 @@ fs_visitor::emit_general_interpolation(fs_reg *attr, const char *name,
* handed us defined values in only the constant offset
* field of the setup reg.
*/
- for (unsigned int i = 0; i < type->vector_elements; i++) {
+ unsigned vector_elements = type->vector_elements;
+
+ /* Data starts at suboffet 3 in 32-bit units (12 bytes), so it is not
+ * 64-bit aligned and the current implementation fails to read the
+ * data properly. Instead, when there is is a double input varying,
+ * read it as vector of floats with twice the number of components.
+ */
+ if (attr->type == BRW_REGISTER_TYPE_DF) {
+ vector_elements *= 2;
+ attr->type = BRW_REGISTER_TYPE_F;
+ }
+ for (unsigned int i = 0; i < vector_elements; i++) {
struct brw_reg interp = interp_reg(*location, i);
interp = suboffset(interp, 3);
interp.type = attr->type;