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authorEric Anholt <[email protected]>2009-09-04 17:59:08 -0700
committerEric Anholt <[email protected]>2009-09-08 14:28:23 -0700
commitea6dab2537998d6910c04cd7bb68a79bee8fda68 (patch)
tree2aa3e4a6fe105c1bce7dbcd3d80597f31806b080 /src/mesa/drivers/dri/i965
parent58a57e3fc48b4ba081caa6ffaec24dfad9ed002a (diff)
i965: Use the renderbuffer surface size instead of region size for WM surfaces.
For drawing to lower mipmap levels, the region size makes the renderbuffer be the size of the lowest level, instead of the current level. On DRI1, Brian previously found that the RB size was incorrect, so leave this broken there.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 096f74394eb..c3f87504889 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -545,8 +545,13 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
irb->texformat->MesaFormat);
}
key.tiling = region->tiling;
- key.width = region->width;
- key.height = region->height;
+ if (brw->intel.intelScreen->driScrnPriv->dri2.enabled) {
+ key.width = rb->Width;
+ key.height = rb->Height;
+ } else {
+ key.width = region->width;
+ key.height = region->height;
+ }
key.pitch = region->pitch;
key.cpp = region->cpp;
key.draw_offset = region->draw_offset; /* cur 3d or cube face offset */