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authorEric Anholt <[email protected]>2009-11-03 11:28:47 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:06 -0800
commit554a8f4026459406e7d3ed4e7017a88a57492ddf (patch)
tree57d90f94d77f9e5e2cb7dad282795a44d80b736e /src/mesa/drivers/dri/i965
parent51e8a66fa197de7e17fb94d901a4cf26f0812670 (diff)
intel: Start adding defines and some bits for sandybridge bringup.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_upload.c96
2 files changed, 96 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
index e348d4686b1..106cd316327 100644
--- a/src/mesa/drivers/dri/i965/brw_draw.c
+++ b/src/mesa/drivers/dri/i965/brw_draw.c
@@ -124,6 +124,10 @@ static void brw_emit_prim(struct brw_context *brw,
struct brw_3d_primitive prim_packet;
struct intel_context *intel = &brw->intel;
+ /* Last thing to hook up in the pipeline when brw_state_upload.c is done. */
+ if (IS_GEN6(intel->intelScreen->deviceID))
+ return;
+
if (INTEL_DEBUG & DEBUG_PRIMS)
printf("PRIM: %s %d %d\n", _mesa_lookup_enum_by_nr(prim->mode),
prim->start, prim->count);
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 4f477cfc6b3..1ee4f4ab80b 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -35,8 +35,15 @@
#include "brw_state.h"
#include "intel_batchbuffer.h"
#include "intel_buffers.h"
+#include "intel_chipset.h"
-static const struct brw_tracked_state *atoms[] =
+/* This is used to initialize brw->state.atoms[]. We could use this
+ * list directly except for a single atom, brw_constant_buffer, which
+ * has a .dirty value which changes according to the parameters of the
+ * current fragment and vertex programs, and so cannot be a static
+ * value.
+ */
+static const struct brw_tracked_state *gen4_atoms[] =
{
&brw_check_fallback,
@@ -95,6 +102,66 @@ static const struct brw_tracked_state *atoms[] =
&brw_constant_buffer
};
+const struct brw_tracked_state *gen6_atoms[] =
+{
+ &brw_check_fallback,
+
+#if 0
+ &brw_wm_input_sizes,
+ &brw_vs_prog,
+ &brw_gs_prog,
+ &brw_clip_prog,
+ &brw_sf_prog,
+ &brw_wm_prog,
+
+ /* Once all the programs are done, we know how large urb entry
+ * sizes need to be and can decide if we need to change the urb
+ * layout.
+ */
+ &brw_curbe_offsets,
+ &brw_recalculate_urb_fence,
+
+ &brw_cc_vp,
+ &brw_cc_unit,
+
+ &brw_vs_surfaces, /* must do before unit */
+ &brw_wm_constant_surface, /* must do before wm surfaces/bind bo */
+ &brw_wm_surfaces, /* must do before samplers and unit */
+ &brw_wm_samplers,
+
+ &brw_wm_unit,
+ &brw_sf_vp,
+ &brw_sf_unit,
+ &brw_vs_unit, /* always required, enabled or not */
+ &brw_clip_unit,
+ &brw_gs_unit,
+
+ /* Command packets:
+ */
+ &brw_invarient_state,
+ &brw_state_base_address,
+
+ &brw_binding_table_pointers,
+ &brw_blend_constant_color,
+
+ &brw_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+ &brw_aa_line_parameters,
+
+ &brw_psp_urb_cbs,
+
+ &brw_drawing_rect,
+ &brw_indices,
+ &brw_index_buffer,
+ &brw_vertices,
+
+ &brw_constant_buffer
+#endif
+};
void brw_init_state( struct brw_context *brw )
{
@@ -270,6 +337,8 @@ void brw_validate_state( struct brw_context *brw )
struct intel_context *intel = &brw->intel;
struct brw_state_flags *state = &brw->state.dirty;
GLuint i;
+ const struct brw_tracked_state **atoms;
+ int num_atoms;
brw_clear_validated_bos(brw);
@@ -278,6 +347,14 @@ void brw_validate_state( struct brw_context *brw )
brw_add_validated_bo(brw, intel->batch->buf);
+ if (IS_GEN6(intel->intelScreen->deviceID)) {
+ atoms = gen6_atoms;
+ num_atoms = ARRAY_SIZE(gen6_atoms);
+ } else {
+ atoms = gen4_atoms;
+ num_atoms = ARRAY_SIZE(gen4_atoms);
+ }
+
if (brw->emit_state_always) {
state->mesa |= ~0;
state->brw |= ~0;
@@ -305,7 +382,7 @@ void brw_validate_state( struct brw_context *brw )
brw->intel.Fallback = GL_FALSE; /* boolean, not bitfield */
/* do prepare stage for all atoms */
- for (i = 0; i < Elements(atoms); i++) {
+ for (i = 0; i < num_atoms; i++) {
const struct brw_tracked_state *atom = atoms[i];
if (brw->intel.Fallback)
@@ -337,9 +414,20 @@ void brw_validate_state( struct brw_context *brw )
void brw_upload_state(struct brw_context *brw)
{
+ struct intel_context *intel = &brw->intel;
struct brw_state_flags *state = &brw->state.dirty;
int i;
static int dirty_count = 0;
+ const struct brw_tracked_state **atoms;
+ int num_atoms;
+
+ if (IS_GEN6(intel->intelScreen->deviceID)) {
+ atoms = gen6_atoms;
+ num_atoms = ARRAY_SIZE(gen6_atoms);
+ } else {
+ atoms = gen4_atoms;
+ num_atoms = ARRAY_SIZE(gen4_atoms);
+ }
brw_clear_validated_bos(brw);
@@ -352,7 +440,7 @@ void brw_upload_state(struct brw_context *brw)
memset(&examined, 0, sizeof(examined));
prev = *state;
- for (i = 0; i < Elements(atoms); i++) {
+ for (i = 0; i < num_atoms; i++) {
const struct brw_tracked_state *atom = atoms[i];
struct brw_state_flags generated;
@@ -381,7 +469,7 @@ void brw_upload_state(struct brw_context *brw)
}
}
else {
- for (i = 0; i < Elements(atoms); i++) {
+ for (i = 0; i < num_atoms; i++) {
const struct brw_tracked_state *atom = atoms[i];
if (brw->intel.Fallback)