diff options
author | Brian Paul <[email protected]> | 2012-01-16 12:29:11 -0700 |
---|---|---|
committer | Ian Romanick <[email protected]> | 2012-01-27 18:02:40 -0800 |
commit | 73ed8cec4a959124fd4081c99e87594a1e480e12 (patch) | |
tree | cd031b261f273192773e60700036354bcc130afc /src/mesa/drivers/dri/i965 | |
parent | c6e56a69d83f26ffe443abb6e7fe6ce4a2f90041 (diff) |
intel: use intel_rb_format() to get renderbuffer format
This will make future changes cleaner and less invasive.
(cherry picked from commit 924de7dc96f4607cb3d833637b5f69f4b9e2a6d0)
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 11 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 13 |
3 files changed, 16 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 1a7d3282472..68e1e80d3b3 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -209,8 +209,8 @@ brw_depthbuffer_format(struct brw_context *brw) if (!drb && (srb = intel_get_renderbuffer(fb, BUFFER_STENCIL)) && !srb->mt->stencil_mt && - (srb->Base.Format == MESA_FORMAT_S8_Z24 || - srb->Base.Format == MESA_FORMAT_Z32_FLOAT_X24S8)) { + (intel_rb_format(srb) == MESA_FORMAT_S8_Z24 || + intel_rb_format(srb) == MESA_FORMAT_Z32_FLOAT_X24S8)) { drb = srb; } @@ -246,7 +246,7 @@ brw_depthbuffer_format(struct brw_context *brw) return BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT; default: _mesa_problem(ctx, "Unexpected depth format %s\n", - _mesa_get_format_name(drb->Base.Format)); + _mesa_get_format_name(intel_rb_format(drb))); return BRW_DEPTHFORMAT_D16_UNORM; } } diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index b7454b0abeb..62214d1f9e7 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -906,24 +906,25 @@ brw_update_renderbuffer_surface(struct brw_context *brw, uint32_t *surf; uint32_t tile_x, tile_y; uint32_t format = 0; + gl_format rb_format = intel_rb_format(irb); surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 6 * 4, 32, &brw->bind.surf_offset[unit]); - switch (irb->Base.Format) { + switch (rb_format) { case MESA_FORMAT_SARGB8: /* without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB surfaces to the blend/update as sRGB */ if (ctx->Color.sRGBEnabled) - format = brw_format_for_mesa_format(irb->Base.Format); + format = brw_format_for_mesa_format(rb_format); else format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; default: - format = brw->render_target_format[irb->Base.Format]; - if (unlikely(!brw->format_supported_as_render_target[irb->Base.Format])) { + format = brw->render_target_format[rb_format]; + if (unlikely(!brw->format_supported_as_render_target[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(irb->Base.Format)); + __FUNCTION__, _mesa_get_format_name(rb_format)); } break; } diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 940b2947161..adc3a45e12f 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -200,6 +200,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw, struct intel_region *region = irb->mt->region; struct gen7_surface_state *surf; uint32_t tile_x, tile_y; + gl_format rb_format = intel_rb_format(irb); surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, sizeof(*surf), 32, &brw->bind.surf_offset[unit]); @@ -210,21 +211,21 @@ gen7_update_renderbuffer_surface(struct brw_context *brw, if (irb->mt->align_w == 8) surf->ss0.horizontal_alignment = 1; - switch (irb->Base.Format) { + switch (rb_format) { case MESA_FORMAT_SARGB8: /* without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB surfaces to the blend/update as sRGB */ if (ctx->Color.sRGBEnabled) - surf->ss0.surface_format = brw_format_for_mesa_format(irb->Base.Format); + surf->ss0.surface_format = brw_format_for_mesa_format(rb_format); else surf->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break; default: - assert(brw_render_target_supported(intel, irb->Base.Format)); - surf->ss0.surface_format = brw->render_target_format[irb->Base.Format]; - if (unlikely(!brw->format_supported_as_render_target[irb->Base.Format])) { + assert(brw_render_target_supported(intel, rb_format)); + surf->ss0.surface_format = brw->render_target_format[rb_format]; + if (unlikely(!brw->format_supported_as_render_target[rb_format])) { _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", - __FUNCTION__, _mesa_get_format_name(irb->Base.Format)); + __FUNCTION__, _mesa_get_format_name(rb_format)); } break; } |