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authorKeith Whitwell <[email protected]>2006-09-22 14:43:09 +0000
committerKeith Whitwell <[email protected]>2006-09-22 14:43:09 +0000
commit9c5d75e592edd15b737294853fc247b66d74619e (patch)
tree909490f89a50adb1789201ed0727e651a83bbee3 /src/mesa/drivers/dri/i965
parent8a0fb128c30f7f8defcdd7f98b1ded47c83355f9 (diff)
Explicit test for +ve pitches in intelEmitCopyBlit()
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c12
1 files changed, 4 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index c0d6983bd16..b09b0a95e73 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -289,15 +289,11 @@ void intelEmitCopyBlit( struct intel_context *intel,
/* Initial y values don't seem to work with negative pitches. If
* we adjust the offsets manually (below), it seems to work fine.
*
- * However, on broadwater at least, only the top version works
- * correctly with overlapping blits. Luckily we don't need
- * negative pitches and overlapping blits at the same time, as far
- * as I know anyhow.
- *
- * Further, the current i965 driver never requires negative
- * pitches, so just use the old-style blits for now.
+ * On the other hand, if we always adjust, the hardware doesn't
+ * know which blit directions to use, so overlapping copypixels get
+ * the wrong result.
*/
- if (1) {
+ if (dst_pitch > 0 && src_pitch > 0) {
BEGIN_BATCH(8, INTEL_BATCH_NO_CLIPRECTS);
OUT_BATCH( CMD );
OUT_BATCH( dst_pitch | BR13 );