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authorKenneth Graunke <[email protected]>2013-09-01 17:14:25 -0700
committerKenneth Graunke <[email protected]>2013-09-13 14:26:31 -0700
commit3a835b699acd40c8a18cc686b32d91212dff4ca1 (patch)
treea116efb471ade5b273b1f032d47d720ea955d2fc /src/mesa/drivers/dri/i965
parentea373f03e8d7783f70c78f700cd80032fd6dc8c4 (diff)
i965: Add comments to the new brw_state_state structure's fields.
These are largely based on the similar fields in brw->wm. v2: Add a better comment than "Scratch buffer". Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Paul Berry <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index c566bba1ac3..6c04074703b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -835,15 +835,25 @@ struct brw_query_object {
*/
struct brw_stage_state
{
+ /**
+ * Optional scratch buffer used to store spilled register values and
+ * variably-indexed GRF arrays.
+ */
drm_intel_bo *scratch_bo;
+
+ /** Pull constant buffer */
drm_intel_bo *const_bo;
+
/** Offset in the program cache to the program */
uint32_t prog_offset;
+
+ /** Offset in the batchbuffer to Gen4-5 pipelined state (VS/WM/GS_STATE). */
uint32_t state_offset;
uint32_t push_const_offset; /* Offset in the batchbuffer */
int push_const_size; /* in 256-bit register increments */
+ /* Binding table: pointers to SURFACE_STATE entries. */
uint32_t bind_bo_offset;
uint32_t surf_offset[BRW_MAX_VEC4_SURFACES];