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authorKenneth Graunke <[email protected]>2014-08-06 01:08:19 -0700
committerKenneth Graunke <[email protected]>2015-02-02 17:14:38 -0800
commit534f07ee85a3a4981171e3e908578e38b2a9770d (patch)
tree1f74405e9296ae6bc25bd90c7ff3a19f92b7d568 /src/mesa/drivers/dri/i965
parente9b86cb5d66867b66c6d453d7bd60bd56fe6587d (diff)
i965: Add a better PRM citation for the IMS dimension mangling.
Paul originally had to reverse engineer these formulas based on the description about how the sampler works. The description here is not the easiest to follow - especially given that it's from the Sandybridge era, when the hardware only did 4x multisampling. Jordan and I recently found another part of the documentation where they simply state that IMS dimensions must be adjusted by a set of formulas. Quoting this section provides an easy to follow explanation for the code, including 2x/4x/8x/16x. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 11f1876e94a..64752dd0b86 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -290,7 +290,28 @@ intel_miptree_create_layout(struct brw_context *brw,
/* Adjust width/height/depth for MSAA */
mt->msaa_layout = compute_msaa_layout(brw, format, mt->target);
if (mt->msaa_layout == INTEL_MSAA_LAYOUT_IMS) {
- /* In the Sandy Bridge PRM, volume 4, part 1, page 31, it says:
+ /* From the Ivybridge PRM, Volume 1, Part 1, page 108:
+ * "If the surface is multisampled and it is a depth or stencil
+ * surface or Multisampled Surface StorageFormat in SURFACE_STATE is
+ * MSFMT_DEPTH_STENCIL, WL and HL must be adjusted as follows before
+ * proceeding:
+ *
+ * +----------------------------------------------------------------+
+ * | Num Multisamples | W_l = | H_l = |
+ * +----------------------------------------------------------------+
+ * | 2 | ceiling(W_l / 2) * 4 | H_l (no adjustment) |
+ * | 4 | ceiling(W_l / 2) * 4 | ceiling(H_l / 2) * 4 |
+ * | 8 | ceiling(W_l / 2) * 8 | ceiling(H_l / 2) * 4 |
+ * | 16 | ceiling(W_l / 2) * 8 | ceiling(H_l / 2) * 8 |
+ * +----------------------------------------------------------------+
+ * "
+ *
+ * Note that MSFMT_DEPTH_STENCIL just means the IMS (interleaved)
+ * format rather than UMS/CMS (array slices). The Sandybridge PRM,
+ * Volume 1, Part 1, Page 111 has the same formula for 4x MSAA.
+ *
+ * Another more complicated explanation for these adjustments comes
+ * from the Sandybridge PRM, volume 4, part 1, page 31:
*
* "Any of the other messages (sample*, LOD, load4) used with a
* (4x) multisampled surface will in-effect sample a surface with