diff options
| author | Kenneth Graunke <[email protected]> | 2014-01-20 23:06:30 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2014-02-19 15:42:02 -0800 |
| commit | 01c42b2be64ec83c28230c1f8e1cbb2c5f5bd690 (patch) | |
| tree | ef7a4501c9c5ac1b01ce7ebd67b5738046c459be /src/mesa/drivers/dri/i965 | |
| parent | 77c37ed74b8b9bd8407e68961d1b324bf13f7881 (diff) | |
i965: Add missing sample shading bits to Gen8's 3DSTATE_PS_EXTRA.
v2: Also set the "oMask Present to Render Target" bit, which is required
for shaders that write oMask. Otherwise the hardware won't expect
the extra data.
v3: Add missing _NEW_MULTISAMPLE (caught by Eric).
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen8_ps_state.c | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c index 63612e75440..5b7aa34a72d 100644 --- a/src/mesa/drivers/dri/i965/gen8_ps_state.c +++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c @@ -22,6 +22,7 @@ */ #include <stdbool.h> +#include "program/program.h" #include "brw_state.h" #include "brw_defines.h" #include "intel_batchbuffer.h" @@ -29,6 +30,7 @@ static void upload_ps_extra(struct brw_context *brw) { + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ const struct brw_fragment_program *fp = brw_fragment_program_const(brw->fragment_program); @@ -63,6 +65,18 @@ upload_ps_extra(struct brw_context *brw) if (fp->program.Base.InputsRead & VARYING_BIT_POS) dw1 |= GEN8_PSX_USES_SOURCE_DEPTH | GEN8_PSX_USES_SOURCE_W; + /* _NEW_BUFFERS | _NEW_MULTISAMPLE */ + bool multisampled_fbo = ctx->DrawBuffer->Visual.samples > 1; + if (multisampled_fbo && + _mesa_get_min_invocations_per_fragment(ctx, &fp->program, false) > 1) + dw1 |= GEN8_PSX_SHADER_IS_PER_SAMPLE; + + if (fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN) + dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK; + + if (brw->wm.prog_data->uses_omask) + dw1 |= GEN8_PSX_OMASK_TO_RENDER_TARGET; + BEGIN_BATCH(2); OUT_BATCH(_3DSTATE_PS_EXTRA << 16 | (2 - 2)); OUT_BATCH(dw1); @@ -71,7 +85,7 @@ upload_ps_extra(struct brw_context *brw) const struct brw_tracked_state gen8_ps_extra = { .dirty = { - .mesa = 0, + .mesa = _NEW_BUFFERS | _NEW_MULTISAMPLE, .brw = BRW_NEW_CONTEXT | BRW_NEW_FRAGMENT_PROGRAM, .cache = 0, }, |