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authorMatt Turner <[email protected]>2014-09-30 15:06:23 -0700
committerMatt Turner <[email protected]>2014-09-30 17:09:34 -0700
commit3e7f8005db3e8f5f493ab83c1438bb6cf8c840b5 (patch)
treef0a6e3391c80df8949dc33b0396a9c6834de9a5c /src/mesa/drivers/dri/i965
parent9f5e5bd34d8ba48c851b442fb88f742b1ba6a571 (diff)
i965/fs: Emit compressed BFI2 instructions on Gen > 7.
IVB had a restriction that prevented us from emitting compressed three-source instructions, and although that was lifted on Haswell, Haswell had a new restriction that said BFI instructions specifically couldn't be compressed.
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_generator.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 145e0ea44f8..e20d3ccb8a4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1729,7 +1729,7 @@ fs_generator::generate_code(const cfg_t *cfg)
* Otherwise we would be able to emit compressed instructions like we
* do for the other three-source instructions.
*/
- if (dispatch_width == 16) {
+ if (dispatch_width == 16 && brw->gen < 8) {
brw_set_default_compression_control(p, BRW_COMPRESSION_NONE);
brw_BFI2(p, firsthalf(dst), firsthalf(src[0]), firsthalf(src[1]), firsthalf(src[2]));
brw_set_default_compression_control(p, BRW_COMPRESSION_2NDHALF);