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authorKenneth Graunke <[email protected]>2014-04-24 13:54:14 -0700
committerKenneth Graunke <[email protected]>2014-11-03 15:32:51 -0800
commit1df496edb9254d5060288d27114211fd21c02ece (patch)
tree4995f26f9d6ec5f39ee0f7c16ac2bad27a875717 /src/mesa/drivers/dri/i965
parentd18949ad823953b446bf1cef457d4c420dc2e818 (diff)
i965/skl: Allocate 16 DWords for SURFACE_STATE on Skylake.
Otherwise they overlap and horrible things happen. All the new DWords are for fast color clear values, which we don't do yet. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/gen8_surface_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index 269d9aa1aad..de0e9fe45d8 100644
--- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
@@ -84,7 +84,7 @@ horizontal_alignment(struct intel_mipmap_tree *mt)
static uint32_t *
allocate_surface_state(struct brw_context *brw, uint32_t *out_offset)
{
- int dwords = 13;
+ int dwords = brw->gen >= 9 ? 16 : 13;
uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE,
dwords * 4, 64, out_offset);
memset(surf, 0, dwords * 4);