diff options
| author | Eric Anholt <[email protected]> | 2011-12-29 18:12:48 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2012-01-06 09:16:32 -0800 |
| commit | c4089d444a1736dba0c3d9c389ac216ce8711da8 (patch) | |
| tree | 5a71ad91a0d6479811e3d421a556aca9ff23c937 /src/mesa/drivers/dri/i965 | |
| parent | e60daf7e25daaaae34c803834079201ef1cc3900 (diff) | |
i965/gen7: Use the updated interface for SO write pointer resetting.
The new kernel patch I submitted makes the interface opt-in, so all
batchbuffers aren't preceded by the 4 MI_LOAD_REGISTER_IMMs. This
requires the updated i915_drm.h present in libdrm 2.4.30.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_sol_state.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c index 674e14f1252..c4e0622a6e0 100644 --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -240,6 +240,8 @@ upload_sol_state(struct brw_context *brw) if (active) { upload_3dstate_so_buffers(brw); upload_3dstate_so_decl_list(brw, &vue_map); + + intel->batch.needs_sol_reset = true; } /* Finally, set up the SOL stage. This command must always follow updates to |