diff options
author | Ian Romanick <[email protected]> | 2011-11-15 12:01:18 -0800 |
---|---|---|
committer | Ian Romanick <[email protected]> | 2012-01-11 12:51:24 -0800 |
commit | b527dd65c830a2b008816cf390d5be906e29bb23 (patch) | |
tree | 7582147e6d7b182608985c0718d0e6a386f55c34 /src/mesa/drivers/dri/i965 | |
parent | ca5b30bf8142d916a40eaaa7091882464a237f1f (diff) |
mesa: Track fixed-function fragment shader as a shader
Previously the fixed-function fragment shader was tracked as a
gl_program. This means that it shows up in the driver as a Mesa IR
program instead of as a GLSL IR program. If a driver doesn't generate
Mesa IR from the GLSL IR, that program is empty. If the program is
empty there is either no rendering or a GPU hang.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
Acked-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_state.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_wm_state.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_state.c | 4 |
4 files changed, 9 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index cad0af8c1ac..7dee20b7f92 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -543,7 +543,7 @@ brw_upload_wm_prog(struct brw_context *brw) if (!brw_search_cache(&brw->cache, BRW_WM_PROG, &key, sizeof(key), &brw->wm.prog_offset, &brw->wm.prog_data)) { - bool success = do_wm_prog(brw, ctx->Shader.CurrentFragmentProgram, fp, + bool success = do_wm_prog(brw, ctx->Shader._CurrentFragmentProgram, fp, &key); (void) success; assert(success); diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index e1791c20ea7..dd67795e743 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -169,9 +169,9 @@ brw_upload_wm_unit(struct brw_context *brw) * If using the fragment shader backend, the program is always * 8-wide. If not, it's always 16. */ - if (ctx->Shader.CurrentFragmentProgram) { + if (ctx->Shader._CurrentFragmentProgram) { struct brw_shader *shader = (struct brw_shader *) - ctx->Shader.CurrentFragmentProgram->_LinkedShaders[MESA_SHADER_FRAGMENT]; + ctx->Shader._CurrentFragmentProgram->_LinkedShaders[MESA_SHADER_FRAGMENT]; if (shader != NULL && shader->ir != NULL) { wm->wm5.enable_8_pix = 1; diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c index 0547eb8a0b3..3669811be55 100644 --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c @@ -135,7 +135,9 @@ upload_wm_state(struct brw_context *brw) dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5; /* Use ALT floating point mode for ARB fragment programs, because they - * require 0^0 == 1. + * require 0^0 == 1. Even though _CurrentFragmentProgram is used for + * rendering, CurrentFragmentProgram is used for this check to + * differentiate between the GLSL and non-GLSL cases. */ if (ctx->Shader.CurrentFragmentProgram == NULL) dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT; diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index 1468fcc1278..32222f922d8 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c @@ -166,7 +166,9 @@ upload_ps_state(struct brw_context *brw) dw2 |= (ALIGN(brw->sampler.count, 4) / 4) << GEN7_PS_SAMPLER_COUNT_SHIFT; /* Use ALT floating point mode for ARB fragment programs, because they - * require 0^0 == 1. + * require 0^0 == 1. Even though _CurrentFragmentProgram is used for + * rendering, CurrentFragmentProgram is used for this check to + * differentiate between the GLSL and non-GLSL cases. */ if (intel->ctx.Shader.CurrentFragmentProgram == NULL) dw2 |= GEN7_PS_FLOATING_POINT_MODE_ALT; |