summaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965
diff options
context:
space:
mode:
authorKenneth Graunke <[email protected]>2012-01-18 04:53:40 -0800
committerKenneth Graunke <[email protected]>2012-01-18 14:42:04 -0800
commit2e712e41db0c0676e9f30fc73172c0e8de8d84d4 (patch)
tree3a2672ae7b1f6ac3be61c9701333190f7e71b041 /src/mesa/drivers/dri/i965
parent81da773f841aa69debc473537750c475e6261e37 (diff)
i965/vs: Take attributes into account when deciding urb_entry_size.
Both the VF and VS share space in the URB. First, the VF stores attributes (shader inputs) there. The VS then reads the attributes, executes, and reuses the space to store varyings (shader outputs). Thus, we need to calculate the amount of URB space necessary for inputs, outputs, and pick whichever is greater. The old VS backend correctly did this (brw_vs_emit.c:408), but the new VS backend only considered outputs. Fixes vertex scrambling in GLBenchmark PRO on Ivybridge. NOTE: This is a candidate for the 8.0 branch. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41318 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_emit.cpp8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp5
2 files changed, 8 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index a618614c73c..dbe4dd093dd 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -25,6 +25,7 @@
extern "C" {
#include "brw_eu.h"
+#include "main/macros.h"
};
using namespace brw;
@@ -95,6 +96,13 @@ vec4_visitor::setup_attributes(int payload_reg)
prog_data->urb_read_length = (nr_attributes + 1) / 2;
+ unsigned vue_entries = MAX2(nr_attributes, c->vue_map.num_slots);
+
+ if (intel->gen == 6)
+ c->prog_data.urb_entry_size = ALIGN(vue_entries, 8) / 8;
+ else
+ c->prog_data.urb_entry_size = ALIGN(vue_entries, 4) / 4;
+
return payload_reg + nr_attributes;
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index ecabcc81e9e..06bde92c8d8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2286,11 +2286,6 @@ vec4_visitor::emit_urb_writes()
*/
inst->offset = (max_usable_mrf - base_mrf) / 2;
}
-
- if (intel->gen == 6)
- c->prog_data.urb_entry_size = ALIGN(c->vue_map.num_slots, 8) / 8;
- else
- c->prog_data.urb_entry_size = ALIGN(c->vue_map.num_slots, 4) / 4;
}
src_reg