diff options
author | Mark Mueller <[email protected]> | 2014-01-26 15:12:56 -0800 |
---|---|---|
committer | Mark Mueller <[email protected]> | 2014-01-27 14:31:55 -0800 |
commit | eeed49f5f290793870c60b5b635b977a732a1eb4 (patch) | |
tree | 731287bc0b7a0d77e589c64d4a8276baff7ac5ad /src/mesa/drivers/dri/i965/intel_screen.c | |
parent | 50a01d2acafb2a937e62b24258e2e777c0cd1489 (diff) |
mesa: Change many Type P MESA_FORMATs to meet naming spec
Conversion of Type P formats as follows (w/related comment fixes):
s/MESA_FORMAT_RGB565\b/MESA_FORMAT_B5G6R5_UNORM/g
s/MESA_FORMAT_RGB565_REV\b/MESA_FORMAT_R5G6B5_UNORM/g
s/MESA_FORMAT_ARGB4444\b/MESA_FORMAT_B4G4R4A4_UNORM/g
s/MESA_FORMAT_ARGB4444_REV\b/MESA_FORMAT_A4R4G4B4_UNORM/g
s/MESA_FORMAT_RGBA5551\b/MESA_FORMAT_A1B5G5R5_UNORM/g
s/MESA_FORMAT_XBGR8888_SNORM\b/MESA_FORMAT_R8G8B8X8_SNORM/g
s/MESA_FORMAT_XBGR8888_SRGB\b/MESA_FORMAT_R8G8B8X8_SRGB/g
s/MESA_FORMAT_ARGB1555\b/MESA_FORMAT_B5G5R5A1_UNORM/g
s/MESA_FORMAT_ARGB1555_REV\b/MESA_FORMAT_A1R5G5B5_UNORM/g
s/MESA_FORMAT_AL44\b/MESA_FORMAT_L4A4_UNORM/g
s/MESA_FORMAT_RGB332\b/MESA_FORMAT_B2G3R3_UNORM/g
s/MESA_FORMAT_ARGB2101010\b/MESA_FORMAT_B10G10R10A2_UNORM/g
s/MESA_FORMAT_Z24_S8\b/MESA_FORMAT_S8_UINT_Z24_UNORM/g
s/MESA_FORMAT_S8_Z24\b/MESA_FORMAT_Z24_UNORM_S8_UINT/g
s/MESA_FORMAT_X8_Z24\b/MESA_FORMAT_Z24_UNORM_X8_UINT/g
s/MESA_FORMAT_Z24_X8\b/MESA_FORMAT_X8Z24_UNORM/g
s/MESA_FORMAT_RGB9_E5_FLOAT\b/MESA_FORMAT_R9G9B9E5_FLOAT/g
s/MESA_FORMAT_R11_G11_B10_FLOAT\b/MESA_FORMAT_R11G11B10_FLOAT/g
s/MESA_FORMAT_Z32_FLOAT_X24S8\b/MESA_FORMAT_Z32_FLOAT_S8X24_UINT/g
s/MESA_FORMAT_ABGR2101010_UINT\b/MESA_FORMAT_R10G10B10A2_UINT/g
s/MESA_FORMAT_XRGB4444_UNORM\b/MESA_FORMAT_B4G4R4X4_UNORM/g
s/MESA_FORMAT_XRGB1555_UNORM\b/MESA_FORMAT_B5G5R5X1_UNORM/g
s/MESA_FORMAT_XRGB2101010_UNORM\b/MESA_FORMAT_B10G10R10X2_UNORM/g
s/MESA_FORMAT_AL88\b/MESA_FORMAT_L8A8_UNORM/g
s/MESA_FORMAT_AL88_REV\b/MESA_FORMAT_A8L8_UNORM/g
s/MESA_FORMAT_AL1616\b/MESA_FORMAT_L16A16_UNORM/g
s/MESA_FORMAT_AL1616_REV\b/MESA_FORMAT_A16L16_UNORM/g
s/MESA_FORMAT_RG88\b/MESA_FORMAT_G8R8_UNORM/g
s/MESA_FORMAT_GR88\b/MESA_FORMAT_R8G8_UNORM/g
s/MESA_FORMAT_GR1616\b/MESA_FORMAT_R16G16_UNORM/g
s/MESA_FORMAT_RG1616\b/MESA_FORMAT_G16R16_UNORM/g
s/MESA_FORMAT_SRGBA8\b/MESA_FORMAT_A8B8G8R8_SRGB/g
s/MESA_FORMAT_SARGB8\b/MESA_FORMAT_B8G8R8A8_SRGB/g
s/MESA_FORMAT_SLA8\b/MESA_FORMAT_L8A8_SRGB/g
Conflicts:
src/mesa/drivers/dri/i965/brw_surface_formats.c
src/mesa/main/format_pack.c
src/mesa/main/format_unpack.c
src/mesa/main/formats.c
src/mesa/main/texformat.c
src/mesa/main/texstore.c
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_screen.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_screen.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 1b884cbcad4..7700a4ef0cf 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -976,13 +976,13 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, _mesa_initialize_window_framebuffer(fb, mesaVis); if (mesaVis->redBits == 5) - rgbFormat = MESA_FORMAT_RGB565; + rgbFormat = MESA_FORMAT_B5G6R5_UNORM; else if (mesaVis->sRGBCapable) - rgbFormat = MESA_FORMAT_SARGB8; + rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB; else if (mesaVis->alphaBits == 0) rgbFormat = MESA_FORMAT_B8G8R8X8_UNORM; else { - rgbFormat = MESA_FORMAT_SARGB8; + rgbFormat = MESA_FORMAT_B8G8R8A8_SRGB; fb->Visual.sRGBCapable = true; } @@ -1004,7 +1004,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, assert(mesaVis->stencilBits == 8); if (screen->devinfo->has_hiz_and_separate_stencil) { - rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24, + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); rb = intel_create_private_renderbuffer(MESA_FORMAT_S_UINT8, @@ -1015,7 +1015,7 @@ intelCreateBuffer(__DRIscreen * driScrnPriv, * Use combined depth/stencil. Note that the renderbuffer is * attached to two attachment points. */ - rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24, + rb = intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, num_samples); _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base); _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base); @@ -1125,7 +1125,7 @@ static __DRIconfig** intel_screen_make_configs(__DRIscreen *dri_screen) { static const mesa_format formats[] = { - MESA_FORMAT_RGB565, + MESA_FORMAT_B5G6R5_UNORM, MESA_FORMAT_B8G8R8A8_UNORM }; @@ -1154,7 +1154,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) depth_bits[0] = 0; stencil_bits[0] = 0; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[1] = 16; stencil_bits[1] = 0; if (devinfo->gen >= 6) { @@ -1183,7 +1183,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) for (int i = 0; i < ARRAY_SIZE(formats); i++) { __DRIconfig **new_configs; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[0] = 16; stencil_bits[0] = 0; } else { @@ -1223,7 +1223,7 @@ intel_screen_make_configs(__DRIscreen *dri_screen) depth_bits[0] = 0; stencil_bits[0] = 0; - if (formats[i] == MESA_FORMAT_RGB565) { + if (formats[i] == MESA_FORMAT_B5G6R5_UNORM) { depth_bits[1] = 16; stencil_bits[1] = 0; } else { |