diff options
| author | Daniel Stone <[email protected]> | 2016-05-02 15:34:40 +0100 |
|---|---|---|
| committer | Daniel Stone <[email protected]> | 2016-05-09 10:35:55 +0100 |
| commit | e54b2e902aba22f697c0ba8622cd0a905f1edfff (patch) | |
| tree | 7a49e670de554dc46c23fc754fdcf48201f68f18 /src/mesa/drivers/dri/i965/intel_screen.c | |
| parent | 920d78a32c25eae051599896fe186aa8507cd007 (diff) | |
Revert "i965: Always use Y-tiled buffers on SKL+"
This commit broke Weston, Mutter, and xf86-video-modesetting, on KMS.
In order to use Y-tiled buffers, the kernel requires the tiling mode to
be explicitly named through the I915_FORMAT_MOD_Y_TILED AddFB2 modifier;
it disallows any attempt to infer the buffer's tiling mode.
As the GBM API does not have a way to extract modifiers for a buffer,
this commit broke all users of GBM on SKL+. Revert it for now, until we
get a way to extract modifier information from GBM, and also let GBM
users inform the implementation that it intends to use the modifiers.
This reverts commit 6a0d036483caf87d43ebe2edd1905873446c9589.
Signed-off-by: Daniel Stone <[email protected]>
Acked-by: Ben Widawsky <[email protected]>
Tested-by: Hans de Goede <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_screen.c')
| -rw-r--r-- | src/mesa/drivers/dri/i965/intel_screen.c | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 878901ac1f9..db9d94d3b34 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -516,11 +516,7 @@ intel_create_image(__DRIscreen *screen, int cpp; unsigned long pitch; - if (intelScreen->devinfo->gen >= 9) { - tiling = I915_TILING_Y; - } else { - tiling = I915_TILING_X; - } + tiling = I915_TILING_X; if (use & __DRI_IMAGE_USE_CURSOR) { if (width != 64 || height != 64) return NULL; @@ -1148,14 +1144,8 @@ intel_detect_swizzling(struct intel_screen *screen) drm_intel_bo *buffer; unsigned long flags = 0; unsigned long aligned_pitch; + uint32_t tiling = I915_TILING_X; uint32_t swizzle_mode = 0; - uint32_t tiling; - - if (screen->devinfo->gen >= 9) { - tiling = I915_TILING_Y; - } else { - tiling = I915_TILING_X; - } buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test", 64, 64, 4, @@ -1581,12 +1571,7 @@ intelAllocateBuffer(__DRIscreen *screen, return NULL; /* The front and back buffers are color buffers, which are X tiled. */ - uint32_t tiling; - if (intelScreen->devinfo->gen >= 9) { - tiling = I915_TILING_Y; - } else { - tiling = I915_TILING_X; - } + uint32_t tiling = I915_TILING_X; unsigned long pitch; int cpp = format / 8; intelBuffer->bo = drm_intel_bo_alloc_tiled(intelScreen->bufmgr, |