diff options
author | Eric Anholt <[email protected]> | 2007-10-04 12:07:25 -0700 |
---|---|---|
committer | Eric Anholt <[email protected]> | 2007-10-04 12:28:49 -0700 |
commit | 77e0523fb7769df4bf43747e136b1653b2421b97 (patch) | |
tree | 27337de5a5460aad8428969a504621c98e95fb16 /src/mesa/drivers/dri/i965/intel_mipmap_tree.c | |
parent | 0fc9efd8f0b1b6c4e3525a50e3478e5aef72531a (diff) |
[965] Replace various alignment code with a shared ALIGN() macro.
In the process, fix some alignment issues:
- Scratch space allocation was aligned into units of 1KB, while the allocation
wanted units of bytes, so we never allocated enough space for scratch.
- GRF register count was programmed as ALIGN(val - 1, 16) / 16 instead of
ALIGN(val, 16) / 16 - 1, which overcounted for val != 16n+1.
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_mipmap_tree.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 0fb33e27f47..268a982a97f 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -233,8 +233,8 @@ GLboolean intel_miptree_image_data(struct intel_context *intel, if (dst->compressed) { alignment = intel_compressed_alignment(dst->internal_format); - src_row_pitch = ((src_row_pitch + alignment - 1) & ~(alignment - 1)); - width = ((width + alignment - 1) & ~(alignment - 1)); + src_row_pitch = ALIGN(src_row_pitch, alignment); + width = ALIGN(width, alignment); height = (height + 3) / 4; } |