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author | Kenneth Graunke <[email protected]> | 2017-01-24 00:45:53 -0800 |
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committer | Kenneth Graunke <[email protected]> | 2017-01-26 00:52:52 -0800 |
commit | fcf723b647f36fa174d29b1fe6a9732637a1f8d1 (patch) | |
tree | 82c501a569c1746b34d159b04001ef6a4d85f4d1 /src/mesa/drivers/dri/i965/intel_blit.h | |
parent | 9b25769da63999fa65a70a14194a452c49d18f3e (diff) |
i965: Use a UW source type for CS_OPCODE_CS_TERMINATE.
SIMD16 compute shaders use a send(16) with mlen 1 for the EOT message,
using a source of g127 for the single register. With a UD type, this
supposedly could read g128, which doesn't exist, causing the simulator
to get cranky. Use a UW type to avoid this.
Cc: "17.0" <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_blit.h')
0 files changed, 0 insertions, 0 deletions