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authorLionel Landwerlin <[email protected]>2017-08-30 09:19:47 +0100
committerLionel Landwerlin <[email protected]>2017-08-30 17:59:17 +0100
commit97e90113c662b73b0b2d37385df516dbaa937d19 (patch)
treeaffc6d1d3919237961aa24da0c82af40a78b0bc8 /src/mesa/drivers/dri/i965/intel_batchbuffer.c
parentd324197de9e9c4c3c18a2ee8c0508462dc8bcdf5 (diff)
i965: drop brw->is_haswell in favor of devinfo->is_haswell
Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/intel_batchbuffer.c')
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index fddb96016b6..c7d7029fbd0 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -506,7 +506,7 @@ brw_finish_batch(struct brw_context *brw)
if (devinfo->gen >= 7)
gen7_restore_default_l3_config(brw);
- if (brw->is_haswell) {
+ if (devinfo->is_haswell) {
/* From the Haswell PRM, Volume 2b, Command Reference: Instructions,
* 3DSTATE_CC_STATE_POINTERS > "Note":
*
@@ -999,7 +999,7 @@ brw_load_register_reg(struct brw_context *brw, uint32_t src, uint32_t dest)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
- assert(devinfo->gen >= 8 || brw->is_haswell);
+ assert(devinfo->gen >= 8 || devinfo->is_haswell);
BEGIN_BATCH(3);
OUT_BATCH(MI_LOAD_REGISTER_REG | (3 - 2));
@@ -1016,7 +1016,7 @@ brw_load_register_reg64(struct brw_context *brw, uint32_t src, uint32_t dest)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
- assert(devinfo->gen >= 8 || brw->is_haswell);
+ assert(devinfo->gen >= 8 || devinfo->is_haswell);
BEGIN_BATCH(6);
OUT_BATCH(MI_LOAD_REGISTER_REG | (3 - 2));