i965: Create prog_data temporary variables in PS state upload code.

prog_data->foo is a bit more readable than brw->wm.prog_data->foo.
The local variable definition is also a great location to put the
obligatory /* CACHE_NEW_WM_PROG */ comment.

Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>

1 files changed, 19 insertions, 16 deletions

diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c
index 7e3d78b6348..d6577fd704c 100644
--- a/src/mesa/drivers/dri/i965/gen8_ps_state.c
+++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c
@@ -34,6 +34,8 @@ upload_ps_extra(struct brw_context *brw)
    /* BRW_NEW_FRAGMENT_PROGRAM */
    const struct brw_fragment_program *fp =
       brw_fragment_program_const(brw->fragment_program);
+   /* CACHE_NEW_WM_PROG */
+   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
    uint32_t dw1 = 0;
 
    dw1 |= GEN8_PSX_PIXEL_SHADER_VALID;
@@ -41,8 +43,7 @@ upload_ps_extra(struct brw_context *brw)
    if (fp->program.UsesKill)
       dw1 |= GEN8_PSX_KILL_ENABLE;
 
-   /* CACHE_NEW_WM_PROG */
-   if (brw->wm.prog_data->num_varying_inputs != 0)
+   if (prog_data->num_varying_inputs != 0)
       dw1 |= GEN8_PSX_ATTRIBUTE_ENABLE;
 
    if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
@@ -74,7 +75,7 @@ upload_ps_extra(struct brw_context *brw)
    if (fp->program.Base.SystemValuesRead & SYSTEM_BIT_SAMPLE_MASK_IN)
       dw1 |= GEN8_PSX_SHADER_USES_INPUT_COVERAGE_MASK;
 
-   if (brw->wm.prog_data->uses_omask)
+   if (prog_data->uses_omask)
       dw1 |= GEN8_PSX_OMASK_TO_RENDER_TARGET;
 
    BEGIN_BATCH(2);
@@ -136,6 +137,9 @@ upload_ps_state(struct brw_context *brw)
    struct gl_context *ctx = &brw->ctx;
    uint32_t dw3 = 0, dw6 = 0, dw7 = 0, ksp0, ksp2 = 0;
 
+   /* CACHE_NEW_WM_PROG */
+   const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
+
    /* Initialize the execution mask with VMask.  Otherwise, derivatives are
     * incorrect for subspans where some of the pixels are unlit.  We believe
     * the bit just didn't take effect in previous generations.
@@ -147,7 +151,7 @@ upload_ps_state(struct brw_context *brw)
 
    /* CACHE_NEW_WM_PROG */
    dw3 |=
-      ((brw->wm.prog_data->base.binding_table.size_bytes / 4) <<
+      ((prog_data->base.binding_table.size_bytes / 4) <<
        GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT);
 
    /* Use ALT floating point mode for ARB fragment programs, because they
@@ -163,8 +167,7 @@ upload_ps_state(struct brw_context *brw)
     */
    dw6 |= (64 - 2) << HSW_PS_MAX_THREADS_SHIFT;
 
-   /* CACHE_NEW_WM_PROG */
-   if (brw->wm.prog_data->base.nr_params > 0)
+   if (prog_data->base.nr_params > 0)
       dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE;
 
    /* From the documentation for this packet:
@@ -197,25 +200,25 @@ upload_ps_state(struct brw_context *brw)
       _mesa_get_min_invocations_per_fragment(ctx, brw->fragment_program, false);
    assert(min_invocations_per_fragment >= 1);
 
-   if (brw->wm.prog_data->prog_offset_16 || brw->wm.prog_data->no_8) {
+   if (prog_data->prog_offset_16 || prog_data->no_8) {
       dw6 |= GEN7_PS_16_DISPATCH_ENABLE;
-      if (!brw->wm.prog_data->no_8 && min_invocations_per_fragment == 1) {
+      if (!prog_data->no_8 && min_invocations_per_fragment == 1) {
          dw6 |= GEN7_PS_8_DISPATCH_ENABLE;
-         dw7 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
+         dw7 |= (prog_data->base.dispatch_grf_start_reg <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
-         dw7 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
+         dw7 |= (prog_data->dispatch_grf_start_reg_16 <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_2);
          ksp0 = brw->wm.base.prog_offset;
-         ksp2 = brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16;
+         ksp2 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
       } else {
-         dw7 |= (brw->wm.prog_data->dispatch_grf_start_reg_16 <<
+         dw7 |= (prog_data->dispatch_grf_start_reg_16 <<
                  GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
 
-         ksp0 = brw->wm.base.prog_offset + brw->wm.prog_data->prog_offset_16;
+         ksp0 = brw->wm.base.prog_offset + prog_data->prog_offset_16;
       }
    } else {
       dw6 |= GEN7_PS_8_DISPATCH_ENABLE;
-      dw7 |= (brw->wm.prog_data->base.dispatch_grf_start_reg <<
+      dw7 |= (prog_data->base.dispatch_grf_start_reg <<
               GEN7_PS_DISPATCH_START_GRF_SHIFT_0);
       ksp0 = brw->wm.base.prog_offset;
    }
@@ -225,10 +228,10 @@ upload_ps_state(struct brw_context *brw)
    OUT_BATCH(ksp0);
    OUT_BATCH(0);
    OUT_BATCH(dw3);
-   if (brw->wm.prog_data->base.total_scratch) {
+   if (prog_data->base.total_scratch) {
       OUT_RELOC64(brw->wm.base.scratch_bo,
                   I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
-                  ffs(brw->wm.prog_data->base.total_scratch) - 11);
+                  ffs(prog_data->base.total_scratch) - 11);
    } else {
       OUT_BATCH(0);
       OUT_BATCH(0);