aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa/drivers/dri/i965/gen7_wm_state.c
diff options
context:
space:
mode:
authorChad Versace <[email protected]>2011-12-21 17:09:58 -0800
committerChad Versace <[email protected]>2012-01-10 15:52:38 -0800
commit06ad9adcb031b97af2ce9cd22b919b8befcec43b (patch)
tree0ab7a009b8241d2cb75f32b1e4d242ddf05ca687 /src/mesa/drivers/dri/i965/gen7_wm_state.c
parentbebc91f0f3a1f2d19d36a7f1a4f7c992ace064e9 (diff)
i965/gen7: Enable HiZ
This patch modifies all batches needed for HiZ. The batch length for 3DSTATE_HIER_DEPTH_BUFFER is also corrected from 4 to 3. Performance +6.7% on Citybench. num-frames: 400 resolution: 1918x1031 avg-hiz-off: 127.90 fps avg-hiz-on: 136.50 fps kernel: git://people.freedesktop.org/~anholt/linux.git branch=gen7-reset-sol sha=23360e4 Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen7_wm_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_state.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c
index 504599149cb..1468fcc1278 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c
@@ -49,6 +49,23 @@ upload_wm_state(struct brw_context *brw)
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0;
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5;
+ switch (brw->hiz.op) {
+ case BRW_HIZ_OP_NONE:
+ break;
+ case BRW_HIZ_OP_DEPTH_CLEAR:
+ dw1 |= GEN7_WM_DEPTH_CLEAR;
+ break;
+ case BRW_HIZ_OP_DEPTH_RESOLVE:
+ dw1 |= GEN7_WM_DEPTH_RESOLVE;
+ break;
+ case BRW_HIZ_OP_HIZ_RESOLVE:
+ dw1 |= GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE;
+ break;
+ default:
+ assert(0);
+ break;
+ }
+
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw1 |= GEN7_WM_LINE_STIPPLE_ENABLE;
@@ -89,6 +106,7 @@ const struct brw_tracked_state gen7_wm_state = {
.mesa = (_NEW_LINE | _NEW_LIGHT | _NEW_POLYGON |
_NEW_COLOR | _NEW_BUFFERS),
.brw = (BRW_NEW_FRAGMENT_PROGRAM |
+ BRW_NEW_HIZ |
BRW_NEW_BATCH),
.cache = 0,
},