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authorEric Anholt <[email protected]>2012-02-14 21:48:43 -0800
committerEric Anholt <[email protected]>2012-02-21 11:54:06 -0800
commit71d71d5e891570e8516c65471939a2ebdc07282a (patch)
treed373c0690b4ee1ebfb46390608b8c0e855c662c1 /src/mesa/drivers/dri/i965/gen6_wm_state.c
parentf0cecd43d6b6d3f5def3fd43b9c95baaf3be9b16 (diff)
i965: Compute required barycentric interp modes once at FS compile time.
Improves VS state change microbenchmark performance 1.78817% +/- 0.556878% (n=25). Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_wm_state.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 205e6480e07..fd1eca45049 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -99,9 +99,6 @@ upload_wm_state(struct brw_context *brw)
brw_fragment_program_const(brw->fragment_program);
uint32_t dw2, dw4, dw5, dw6;
- /* _NEW_LIGHT */
- bool flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
-
/* CACHE_NEW_WM_PROG */
if (brw->wm.prog_data->nr_params == 0) {
/* Disable the push constant buffers. */
@@ -173,7 +170,8 @@ upload_wm_state(struct brw_context *brw)
dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
dw5 |= GEN6_WM_COMPUTED_DEPTH;
- dw6 |= brw_compute_barycentric_interp_modes(flat_shade, &fp->program) <<
+ /* CACHE_NEW_WM_PROG */
+ dw6 |= brw->wm.prog_data->barycentric_interp_modes <<
GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR */
@@ -210,7 +208,6 @@ upload_wm_state(struct brw_context *brw)
const struct brw_tracked_state gen6_wm_state = {
.dirty = {
.mesa = (_NEW_LINE |
- _NEW_LIGHT |
_NEW_COLOR |
_NEW_BUFFERS |
_NEW_PROGRAM_CONSTANTS |