diff options
author | Iago Toral Quiroga <[email protected]> | 2014-07-10 17:00:21 +0200 |
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committer | Iago Toral Quiroga <[email protected]> | 2014-09-19 15:01:15 +0200 |
commit | 5ac8294f9be525c03bdfa97ea123a333d71406b5 (patch) | |
tree | da4802d5d63d1c8ef70d50f3f48137ac688f3211 /src/mesa/drivers/dri/i965/gen6_urb.c | |
parent | c09ddf82ffa13173b55a1b51075be2671378c4ea (diff) |
i965/gen6/gs: Enable URB space for user-provided geometry shaders.
Acked-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_urb.c')
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_urb.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_urb.c b/src/mesa/drivers/dri/i965/gen6_urb.c index b694f5d189c..7af1f37bad8 100644 --- a/src/mesa/drivers/dri/i965/gen6_urb.c +++ b/src/mesa/drivers/dri/i965/gen6_urb.c @@ -52,19 +52,29 @@ gen6_upload_urb( struct brw_context *brw ) int nr_vs_entries, nr_gs_entries; int total_urb_size = brw->urb.size * 1024; /* in bytes */ + bool gs_present = brw->ff_gs.prog_active || brw->geometry_program; + /* CACHE_NEW_VS_PROG */ unsigned vs_size = MAX2(brw->vs.prog_data->base.urb_entry_size, 1); - /* We use the same VUE layout for VS outputs and GS outputs (as it's what - * the SF and Clipper expect), so we can simply make the GS URB entry size - * the same as for the VS. This may technically be too large in cases - * where we have few vertex attributes and a lot of varyings, since the VS - * size is determined by the larger of the two. For now, it's safe. + /* Whe using GS to do transform feedback only we use the same VUE layout for + * VS outputs and GS outputs (as it's what the SF and Clipper expect), so we + * can simply make the GS URB entry size the same as for the VS. This may + * technically be too large in cases where we have few vertex attributes and + * a lot of varyings, since the VS size is determined by the larger of the + * two. For now, it's safe. + * + * For user-provided GS the assumption above does not hold since the GS + * outputs can be different from the VS outputs. */ unsigned gs_size = vs_size; + if (brw->geometry_program) { + gs_size = brw->gs.prog_data->base.urb_entry_size; + assert(gs_size >= 1); + } /* Calculate how many entries fit in each stage's section of the URB */ - if (brw->ff_gs.prog_active) { + if (gs_present) { nr_vs_entries = (total_urb_size/2) / (vs_size * 128); nr_gs_entries = (total_urb_size/2) / (gs_size * 128); } else { @@ -109,16 +119,16 @@ gen6_upload_urb( struct brw_context *brw ) * doesn't exist on Gen6). So for now we just do a full pipeline flush as * a workaround. */ - if (brw->urb.gen6_gs_previously_active && !brw->ff_gs.prog_active) + if (brw->urb.gen6_gs_previously_active && !gs_present) intel_batchbuffer_emit_mi_flush(brw); - brw->urb.gen6_gs_previously_active = brw->ff_gs.prog_active; + brw->urb.gen6_gs_previously_active = gs_present; } const struct brw_tracked_state gen6_urb = { .dirty = { .mesa = 0, - .brw = BRW_NEW_CONTEXT, - .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_FF_GS_PROG), + .brw = (BRW_NEW_CONTEXT | BRW_NEW_GEOMETRY_PROGRAM), + .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG | CACHE_NEW_FF_GS_PROG), }, .emit = gen6_upload_urb, }; |