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authorEric Anholt <[email protected]>2011-06-19 12:04:46 -0700
committerEric Anholt <[email protected]>2011-06-28 10:17:39 -0700
commita09c5c2e3053c48a33134cf28229105bfef52e6f (patch)
treea1bd6a2542d96e364d8de2da97c8e020aaebe916 /src/mesa/drivers/dri/i965/gen6_cc.c
parentcd7bfd5d44f543246faa7ad6ff2f8309189be963 (diff)
i965: Reissue PIPELINE_POINTERS and BINDING_TABLE_POINTERS on SBA change.
This was a requirement we didn't run into until we started using STATE_BASE_ADDRESS for instruction data.
Diffstat (limited to 'src/mesa/drivers/dri/i965/gen6_cc.c')
-rw-r--r--src/mesa/drivers/dri/i965/gen6_cc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c
index 2b16d6cdc01..294d5a5e644 100644
--- a/src/mesa/drivers/dri/i965/gen6_cc.c
+++ b/src/mesa/drivers/dri/i965/gen6_cc.c
@@ -183,7 +183,8 @@ static void upload_cc_state_pointers(struct brw_context *brw)
const struct brw_tracked_state gen6_cc_state_pointers = {
.dirty = {
.mesa = 0,
- .brw = BRW_NEW_BATCH,
+ .brw = (BRW_NEW_BATCH |
+ BRW_NEW_STATE_BASE_ADDRESS),
.cache = (CACHE_NEW_BLEND_STATE |
CACHE_NEW_COLOR_CALC_STATE |
CACHE_NEW_DEPTH_STENCIL_STATE)