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authorMathias Fröhlich <[email protected]>2011-10-31 18:32:59 +0100
committerMathias Fröhlich <[email protected]>2011-11-29 06:35:44 +0100
commitdca6a28a14f22d77273d79d44f57b0d853c0242d (patch)
treec917c9372e56b864262991cf82f48b62b9625bc2 /src/mesa/drivers/dri/i965/brw_vs.c
parentf364ac1da10ff67eba5196c1074aff579864f741 (diff)
mesa: Make gl_program::InputsRead 64 bits.
Make gl_program::InputsRead a 64 bits bitfield. Adapt the intel and radeon driver to handle a 64 bits InputsRead value. Signed-off-by: Mathias Froehlich <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 967f82e1916..81d5f884a5a 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -207,7 +207,7 @@ do_vs_prog(struct brw_context *brw,
if (c.key.copy_edgeflag) {
c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
- c.prog_data.inputs_read |= 1<<VERT_ATTRIB_EDGEFLAG;
+ c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
}
/* Put dummy slots into the VUE for the SF to put the replaced
@@ -318,7 +318,7 @@ static void brw_upload_vs_prog(struct brw_context *brw)
/* BRW_NEW_VERTICES */
for (i = 0; i < VERT_ATTRIB_MAX; i++) {
- if (vp->program.Base.InputsRead & (1 << i) &&
+ if (vp->program.Base.InputsRead & BITFIELD64_BIT(i) &&
brw->vb.inputs[i].glarray->Type == GL_FIXED) {
key.gl_fixed_input_size[i] = brw->vb.inputs[i].glarray->Size;
}