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authorJason Ekstrand <[email protected]>2015-04-17 12:52:00 -0700
committerJason Ekstrand <[email protected]>2015-04-22 16:00:34 -0700
commitcfc56fcee36912d5fb41262c71463292a737160e (patch)
tree40ad98133046dc9cc0b5aa3e36c3fb1b87a80a23 /src/mesa/drivers/dri/i965/brw_vs.c
parent02ccb19495c5804f4ab798c00eeb786ee77aaacc (diff)
i965: Use device_info instead of the context for computing vue maps
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index dabff43a6ee..2ff1a67477a 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -54,7 +54,8 @@ static inline void assign_vue_slot(struct brw_vue_map *vue_map,
* Compute the VUE map for vertex shader program.
*/
void
-brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
+brw_compute_vue_map(const struct brw_device_info *devinfo,
+ struct brw_vue_map *vue_map,
GLbitfield64 slots_valid)
{
vue_map->slots_valid = slots_valid;
@@ -82,7 +83,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
/* VUE header: format depends on chip generation and whether clipping is
* enabled.
*/
- if (brw->gen < 6) {
+ if (devinfo->gen < 6) {
/* There are 8 dwords in VUE header pre-Ironlake:
* dword 0-3 is indices, point width, clip flags.
* dword 4-7 is ndc position
@@ -279,7 +280,8 @@ brw_compile_vs_prog(struct brw_context *brw,
outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
}
- brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written);
+ brw_compute_vue_map(brw->intelScreen->devinfo,
+ &prog_data.base.vue_map, outputs_written);
if (0) {
_mesa_fprint_program_opt(stderr, &c.vp->program.Base, PROG_PRINT_DEBUG,