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authorKristian Høgsberg Kristensen <[email protected]>2015-09-04 17:09:40 -0700
committerKristian Høgsberg Kristensen <[email protected]>2015-09-14 16:56:59 -0700
commita548c75e31b4146d55133cb8c57a82117c196584 (patch)
tree5a7d4d8cbd5a024eacac9643eb07b7a604631e7d /src/mesa/drivers/dri/i965/brw_vs.c
parent84f2ed2cfdab45aa949aa6affe46cfe2944759c1 (diff)
i965: Move perf_debug code to brw_codegen_*_prog()
We're trying to avoid a libdrm dependency in the core compiler, so let's move the perf_debug code one level up from the brw_*_emit() helpers to the brw_codegen_*_prog() helpers. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vs.c')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c29
1 files changed, 24 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 4e0d34f6c6f..465e78f4c74 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -98,10 +98,12 @@ brw_codegen_vs_prog(struct brw_context *brw,
struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
void *mem_ctx;
int i;
- struct gl_shader *vs = NULL;
+ struct brw_shader *vs = NULL;
+ bool start_busy = false;
+ double start_time = 0;
if (prog)
- vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
+ vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
memset(&prog_data, 0, sizeof(prog_data));
@@ -121,9 +123,9 @@ brw_codegen_vs_prog(struct brw_context *brw,
* case being a float value that gets blown up to a vec4, so be
* conservative here.
*/
- param_count = vs->num_uniform_components * 4 +
- vs->NumImages * BRW_IMAGE_PARAM_SIZE;
- stage_prog_data->nr_image_params = vs->NumImages;
+ param_count = vs->base.num_uniform_components * 4 +
+ vs->base.NumImages * BRW_IMAGE_PARAM_SIZE;
+ stage_prog_data->nr_image_params = vs->base.NumImages;
} else {
param_count = vp->program.Base.Parameters->NumParameters * 4;
}
@@ -185,6 +187,12 @@ brw_codegen_vs_prog(struct brw_context *brw,
true);
}
+ if (unlikely(brw->perf_debug)) {
+ start_busy = (brw->batch.last_bo &&
+ drm_intel_bo_busy(brw->batch.last_bo));
+ start_time = get_time();
+ }
+
/* Emit GEN4 code.
*/
program = brw_vs_emit(brw, mem_ctx, key, &prog_data,
@@ -194,6 +202,17 @@ brw_codegen_vs_prog(struct brw_context *brw,
return false;
}
+ if (unlikely(brw->perf_debug) && vs) {
+ if (vs->compiled_once) {
+ brw_vs_debug_recompile(brw, prog, key);
+ }
+ if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
+ perf_debug("VS compile took %.03f ms and stalled the GPU\n",
+ (get_time() - start_time) * 1000);
+ }
+ vs->compiled_once = true;
+ }
+
/* Scratch space is used for register spilling */
if (prog_data.base.base.total_scratch) {
brw_get_scratch_bo(brw, &brw->vs.base.scratch_bo,