diff options
author | Matt Turner <[email protected]> | 2014-11-12 11:28:02 -0800 |
---|---|---|
committer | Matt Turner <[email protected]> | 2014-11-21 10:26:38 -0800 |
commit | bd502139290ea902cbc4b5f535c102f8f98774b1 (patch) | |
tree | 60e9060bdca0add890fa5fba9b25cbb43971a48e /src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | |
parent | 645b471d619b654d3bacfa8598f759833e08db4e (diff) |
i965: Combine offset/texture_offset fields.
texture_offset was only used by some texturing operations, and offset
was only used by spill/unspill and some URB operations. These fields are
never used at the same time.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index af7ca0c2ead..7d4bf5501ff 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -46,7 +46,6 @@ vec4_instruction::vec4_instruction(vec4_visitor *v, this->no_dd_check = false; this->writes_accumulator = false; this->conditional_mod = BRW_CONDITIONAL_NONE; - this->texture_offset = 0; this->target = 0; this->shadow_compare = false; this->ir = v->base_ir; @@ -2468,14 +2467,14 @@ vec4_visitor::visit(ir_texture *ir) vec4_instruction *inst = new(mem_ctx) vec4_instruction(this, opcode); if (ir->offset != NULL && !has_nonconstant_offset) { - inst->texture_offset = + inst->offset = brw_texture_offset(ctx, ir->offset->as_constant()->value.i, ir->offset->type->vector_elements); } /* Stuff the channel select bits in the top of the texture offset */ if (ir->op == ir_tg4) - inst->texture_offset |= gather_channel(ir, sampler) << 16; + inst->offset |= gather_channel(ir, sampler) << 16; /* The message header is necessary for: * - Gen4 (always) @@ -2484,7 +2483,7 @@ vec4_visitor::visit(ir_texture *ir) * - Sampler indices too large to fit in a 4-bit value. */ inst->header_present = - brw->gen < 5 || inst->texture_offset != 0 || ir->op == ir_tg4 || + brw->gen < 5 || inst->offset != 0 || ir->op == ir_tg4 || is_high_sampler(brw, sampler_reg); inst->base_mrf = 2; inst->mlen = inst->header_present + 1; /* always at least one */ |