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authorJason Ekstrand <[email protected]>2015-08-15 09:50:11 -0700
committerJason Ekstrand <[email protected]>2015-08-18 17:48:47 -0700
commitc3b21f2d56d77c8c11115bf110a5e25e9dd7e3d5 (patch)
treef743b48918059ccd38da875b592e051d0a53d095 /src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
parent9b49284c223b284295675775d4344f066b4455db (diff)
i965/reg_allocate: Use make_reg_conflicts_transitive
Instead of adding transitive conflicts as we go, we now add regular conflicts and them make them all transitive at the end. This reduces screen creation time substantially on BDW. The time spent in eglInitialize is reduced from 27.78 ms/call to 9.92 ms/call in debug mode and from 13.15 ms/call to 4.54 ms/call in release mode (about 65% in either case). Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp')
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 617c9889cad..d7b6ad5fa0c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -140,7 +140,7 @@ brw_vec4_alloc_reg_set(struct brw_compiler *compiler)
for (int base_reg = j;
base_reg < j + class_sizes[i];
base_reg++) {
- ra_add_transitive_reg_conflict(compiler->vec4_reg_set.regs, base_reg, reg);
+ ra_add_reg_conflict(compiler->vec4_reg_set.regs, base_reg, reg);
}
reg++;
@@ -158,6 +158,9 @@ brw_vec4_alloc_reg_set(struct brw_compiler *compiler)
}
assert(reg == ra_reg_count);
+ for (int reg = 0; reg < base_reg_count; reg++)
+ ra_make_reg_conflicts_transitive(compiler->vec4_reg_set.regs, reg);
+
ra_set_finalize(compiler->vec4_reg_set.regs, q_values);
for (int i = 0; i < MAX_VGRF_SIZE; i++)